Abstract: Compensation for the current flowing in the collector resistance of a transistor is achieved by generating a compensating current of appropriate magnitude and polarity sense, and applying that compensating current to the base of the transistor. To this end, a voltage equivalent to that across the transistor emitter-collector path is applied across a current conductive device representative of the collector resistance. The current therethrough is then proportioned by a current amplifier and applied to the base of the transistor to be compensated.

Abstract: A reference potential generating circuit, suitable for use as an extrapolated band-gap reference potential generator, includes first and second transistors operated at different emitter current densities wherein the difference between their base-emitter offset potentials is applied to a first resistor connected between their respective bases. That difference potential is scaled up across a second resistor to provide a component of the reference potential. Current proportional to the collector current flow in the second transistor is generated and applied to the second resistor, the collector current of the second transistor being only a fraction of the current flow in the second resistor whereby the value of the second resistor is reduced. This generated current can be the current flowing between the collector and emitter electrodes of a third transistor connected emitter-to-emitter and base-to-base with the second transistor, for example.

Abstract: The difference between the source-to-gate voltages of two MOSFET's with different dopings of the regions in which their respective conduction channels are induced is applied to a resistor to determine the level to which current is regulated in current regulating circuitry embodying the invention.

Abstract: A complementary symmetry inverter comprising two field effect transistors and a current mirror amplifier. A constant bias current is supplied to the master path of the current mirror amplifier. The slave path of the current mirror amplifier and one of said field effect transistors are connected to form a switched current source in series with the other of said transistors. The switched current source limits the peak value of the switching current pulse in the inverter in fixed relation to the current in the master path of the current mirror amplifier when the inverter switches between logic states. The switched current source also limits the current between the inverter output and an external device.

Abstract: Operational transconductance amplifiers are described in which the balanced output currents of a preliminary amplifier stage are applied to the input connections of first and second current amplifiers. A third current amplifier has an input connection to which the output connection of the second current amplifier is connected and has an output connection connected to an output signal terminal to which the output connection of the first current amplifier also connects. At least one of the current amplifiers is a non-linear current amplifier with current gain as between its input and output connections that increases with increasing input current. This increases the capability of the amplifier to source or sink output current without increasing quiescent power consumption.

Abstract: A voltage reference circuit that can use the parasitic bipolar transistors formed by the drain regions, p-well and monolithic substrate of CMOS integrated circuits.First and second common-collector amplifier transistors are arranged to maintain their base-emitter junction current densities in a prescribed ratio. The difference in current density creates a difference in base-emitter potential used to generate a current having a positive temperature coefficient. This current conducted in a resistor connected to the emitter of the first transistor generates a potential having a positive temperature coefficient. The potential across the first resistor in the emitter circuit of the first transistor is summed with the base-emitter potential of the first transistor producing a reference voltage substantially independent of temperature.

Abstract: In a smoke detector of the type wherein an alarm signal is generated to activate an audible indicator and an oscillator circuit drives a pulsating visual indication of standby readiness, the oscillation frequency increases between its standby and alarm modes. In addition, duty cycle means controls the operative period of the alarm indicator during each cycle of the increased frequency. The smoke detector includes a relaxation oscillator where the oscillation frequency is proportional to the charge rate of a capacitor. Independent current sources are connected through separate switches to change the charge rate of the capacitor and thus the oscillation frequency. Each switch is controlled by signals from a separate detector of a condition which requires that the oscillation frequency be changed, for example, the presence of smoke.

Abstract: In a relaxation oscillator where the oscillation frequency is proportional to the charge rate of a capacitor, independent current sources are connected through separate switches to change the charge rate of the capacitor and thus the oscillation frequency. Each switch is controlled by signals from a separate detector of a condition which requires that the oscillation frequency be changed. An oscillation frequency increase between the standby and alarm modes of a smoke detector is accomplished in one disclosed embodiment and duty cycle means for controlling the operative period of the alarm indicator during each cycle of the increased oscillator frequency is disclosed in a more particular embodiment.

Abstract: A current I of predetermined temperature coefficient is supplied to the series connection of at least one semiconductor diode and a positive-temperature-coefficient resistance. This resistance is of such value that a voltage drop with a temperature-coefficient equal to that of I, in terms of percentage change per degree of temperature change, appears across the series connection. A relatively large, zero-temperature-coefficient, adjustable resistance, alone or in series with a zero-temperature-coefficient voltage source, parallels the series connection. Adjustment of the relatively large zero-temperature-coefficient resistance provides a trim for the current flow in the series connection, which trim is substantially unaffected by changing temperature.

Abstract: A self-balancing bridge network has first and second terminals defining a port for receiving power and has third and fourth terminals defining a port across which voltage is to be nulled. Transistors are located between each terminal of the port for receiving power and each terminal of the port across which voltage is to be nulled. A pair of these transistors are differentially degenerated, so that balancing of the bridge establishes predetermined levels of current in all the transistors. Such bridges are useful in two terminal current regulation, reference current sources, and in reference voltage sources.

Abstract: A precision binary weighted current source comprising a switching network connected to a plurality of nominally equal current sources. The switching network has 2.sup.n inputs connected to 2.sup.n current sources, and has n+1 output currents with a precise binary relation therebetween. The switching network is organized internally as a plurality of two input commutating circuits arranged in a plurality of n ranks between the input terminals and the output terminals. Output terminals are selectively connected to each current source so that the average value of each output current is proportional to the average of all of the 2.sup.n input current sources.

Abstract: In a relaxation oscillator having its frequency determined by the charge rate of a capacitor, a switch means is controlled through a field effect transistor to discharge the capacitor at a predetermined charge level when channel current through the FET is reduced as voltage across the capacitor approaches the voltage supply level. The charge rate of the capacitor is substantially unaffected by the FET and substantially no power is drawn to control the switch means while the capacitor is charging. The duty cycle of the output level may be readily controlled in this oscillator without substantially affecting the low power attributes thereof.

Abstract: An integrated-circuit MOS capacitor has a first doped semiconductive region forming one of its plates. This first semiconductor region is electrically isolated from the semiconductor substrate by a second doped semiconductor region, which is of opposite conductivity type to and intervenes between the substrate and the first semiconductive region. The present invention resides in the combination of such an MOS capacitor and a circuit for maintaining the potential in the second semiconductor region of the MOS capacitor structure substantially the same as that appearing on the first semiconductor region for minimizing leakage current flow between them. This circuit also provides the leakage current flowing between the second semiconductor region and the substrate, so the leakage current need not flow from the first semiconductor region.

Abstract: Long-tailed pair connections of MOSFET's are used as voltage comparators, the input stages of operational amplifiers, and other circuitry where their nearly infinite gate impedances can reduce the loading upon preceding circuitry. As conventionally operated, the tail current caused to flow through the interconnected source electrodes of the MOSFET's is sufficient to bias them such that their source-to-gate voltages exceed a threshold voltage, and the input voltage offset error of the long-tailed MOSFET pair is likely to be higher than that of most long-tailed bipolar transistor pairs. By selecting a tail current that is sufficiently small to operate a long-tailed MOSFET pair such that their source-to-gate voltages are in the sub-threshold region, the MOSFET's exhibit exponential drain current versus source-to-gate characteristics which result in markedly reduced input offset voltage error.

Abstract: An improved current amplifier, of the type having input, output and common terminals and which is subject to having widely dissimilar voltages at its input and output terminals has field-effect master and slave transistors formed in a region of semiconductor substrate having an impurity concentration gradient such that the material resistivity increases in a direction into the substrate and provided with relatively deep drain extensions.

Abstract: A field effect transistor in common-drain amplifier connection is followed in direct-coupled cascade by a bipolar transistor of similar conductivity type, in common-emitter amplifier connection, and without emitter degeneration resistance for limiting its collector current by means of current feedback. Rather the collector current is limited by (a) restricting the range of source voltage variation of the field effect transistor by a threshold conducting means between the source electrode of the field effect transistor and the emitter electrode of the bipolar transistor and (b) inserting a resistance between the source electrode of the field effect transistor and the base electrode of the bipolar transistor to limit the maximum base drive current available to the bipolar transistor when the restricted source voltage of the field effect transistor departs most from the emitter voltage of the bipolar transistor.

Abstract: A circuit for preventing latch up of a differential-input stage, which includes both bipolar and field-effect transistors, without degrading performance including means for clamping the base electrode of the slave transistor of a current mirror whenever the potential thereacross approaches a level sufficient to forward bias the base collector junction thereof to forestall its reaching such level.

Abstract: The protection circuit for a first, signal amplifying, insulated-gate field-effect transistor (IGFET) whose gate electrode is connected to an external signal input terminal includes a second IGFET whose gate is also connected to the input terminal. The gate insulators of the IGFETs are protected by a network which includes a, normally reverse biased, diode connected between the gates of the IGFETs and a first node. The second IGFET forms the input of a unity voltage gain, non-inverting, buffer amplifier whose output is applied to the first node whereby a voltage of approximately the same value as the input voltage is applied to the first node. The buffer amplifier thus maintains the voltage across the gate protection diode at approximately zero volt, thereby substantially reducing its leakage current.

Abstract: The transistors of a differential amplifier are coupled at their common emitter electrode connection to a low voltage power supply terminal and at their collector electrodes through respective current sinks to a point of reference potential. The collector electrodes are maintained at a voltage level above the reference potential to permit input signal swings at the base electrodes of the transistors a comparable amount below the reference voltage level. Current sources are provided for satisfying that portion of the current demand of these sinks not furnished by the transistors. When the amplifier is connected to operate as a voltage follower, additional transistors may be provided to prevent an undesirable change in the polarity of the output signal, when the input signal swings substantially below the reference voltage level.