Abstract: A semiconductor memory device includes a stack structure on a substrate, extending in a first direction, and including gate electrode layers and insulating layers stacked alternately with each other, a vertical structure including a vertical channel film extending in a second direction crossing the first direction and a channel insulating film disposed on the vertical channel film and having first areas adjacent to the insulating layers and second areas adjacent to the gate electrode layers, and a high-k film on the channel insulating film. The high-k film includes a first high-k metal oxide film between the first areas and the insulating layers and in contact with the first areas and a second high-k metal oxide film between the second areas and the gate electrode layers and in contact with the second areas, and the first and second high-k metal oxide films include different metal materials.

Abstract: The present invention relates to a binaural beat sound output device having an improved sound field and a method therefor and, more specifically, to: a brainwave sound output device using binaural beats, which receives music desired by a user and applies binaural beats to a specific frequency band thereof, so that the device can provide the music through a stereo sound source while inducing a desired brainwave state by the stereo sound source, and thus can improve the sound field without the sense of rejection or monotony to the music; and a method therefor.

Abstract: The present invention relates to a binaural beat sound output device having an improved sound field and a method therefor and, more specifically, to: a brainwave sound output device using binaural beats, which receives music desired by a user and applies binaural beats to a specific frequency band thereof, so that the device can provide the music through a stereo sound source while inducing a desired brainwave state by the stereo sound source, and thus can improve the sound field without the sense of rejection or monotony to the music; and a method therefor.

Abstract: A smart vehicle system is disclosed, which relates to technology for increasing efficiency of a vehicle-embedded memory. The smart vehicle system includes a host and a storage device. The host selects any one of a first mode and a second mode according to operation, process or workload of a vehicle, and transmits and receives data through different channels in response to the first mode and the second mode. The storage device stores the data received through different channels in the first core circuit and the second core circuit, or reads the data stored in the first core circuit and the second core circuit. The storage device executes different operations in the first mode and the second mode in a manner that an operation to be executed in the first mode is different from an operation to be executed in the second mode.

Abstract: A semiconductor device and a semiconductor system including the same are disclosed. The semiconductor system includes a first semiconductor device having a memory region, the first semiconductor device configured to output reliability information of the memory region to an external part, and a second semiconductor device configured to control the first semiconductor device based on the reliability information.

Abstract: A semiconductor device includes a substrate having a semiconductor layer. A trench is formed within the semiconductor layer. A filling insulating film is disposed within the trench. An insertion liner is disposed within the filling insulating film. The insertion liner is spaced apart from the semiconductor layer and extends along the bottom surface of the trench.

Abstract: A semiconductor integrated circuit may include a first power line, a second power line, a third power line and a protection circuit. The first power line may receive an external voltage. The second power line may receive a voltage greater than the external voltage. The third power line may receive a voltage less than the external voltage applied to the first power line and the voltage applied to the second power line. The protection circuit may from a current path between the first power line, the second power line and the third power line when a surge voltage may be applied to the first power line to discharge the surge voltage to the third power line.

Abstract: A smart vehicle system is disclosed, which relates to technology for increasing efficiency of a vehicle-embedded memory. The smart vehicle system includes a host and a storage device. The host selects any one of a first mode and a second mode according to operation, process or workload of a vehicle, and transmits and receives data through different channels in response to the first mode and the second mode. The storage device stores the data received through different channels in the first core circuit and the second core circuit, or reads the data stored in the first core circuit and the second core circuit. The storage device executes different operations in the first mode and the second mode in a manner that an operation to be executed in the first mode is different from an operation to be executed in the second mode.

Abstract: A smart vehicle system, which relates to technology for improving driving stability, safety and reliability of a vehicle when an error occurs in operational reliability of the vehicle. The smart vehicle system includes a host configured to receive a communication state information, store the received communication state information, and transmit a priority information of a communicable interface in response to the communication state information, a controller configured to select the communicable interface in response to the priority information, when a fault in the storage device is detected, and a communication interface circuit configured to include a plurality of communicable interfaces and to communicate with an external electronic device through the communicable interface selected by the controller.

Abstract: A semiconductor device and a semiconductor system including the same are disclosed. The semiconductor system includes a first semiconductor device having a memory region, the first semiconductor device configured to output reliability information of the memory region to an external part, and a second semiconductor device configured to control the first semiconductor device based on the reliability information.

Abstract: A method for fabricating a semiconductor device includes providing a substrate including a cell region including a bit line structure, a bit line spacer and a lower electrode and a peripheral circuit region including first to third impurity regions, forming an interlayer insulating film on the peripheral circuit region, forming a first metal layer on the interlayer insulating film, forming a first trench and a second trench in the first metal layer between the first and second impurity regions, the second trench is disposed between the second and third impurity regions and exposes the interlayer insulating film, forming a first capping pattern on the first trench to form an air gap in the first trench, filling the second trench with a first insulating material, and forming, on the first metal layer, a contact connected to the third impurity region.

Abstract: Disclosed herein are an audio apparatus and method for inducing a brainwave using a binaural beat, including a frequency shift unit for receiving a first audio sound source signal and generating a second audio sound source signal by shifting some of the frequency band of the first audio sound source signal by a specific frequency, and an audio output unit connected to the frequency shift unit, for outputting first and second audio output signals corresponding to the first and the second audio sound source signals. Accordingly, a user can hear a music signal or an audio signal for learning without being aware of the distortion of a sound source and can change his or her brainwave state without resistance or monotonousness because a required brainwave state is changed by applying a binaural beat to a specific frequency band of an audio signal, in particular, a music signal.

Abstract: A semiconductor device includes a substrate having a semiconductor layer. A trench is formed within the semiconductor layer. A filling insulating film is disposed within the trench. An insertion liner is disposed within the filling insulating film. The insertion liner is spaced apart from the semiconductor layer and extends along the bottom surface of the trench.

Abstract: A method for fabricating a semiconductor device includes providing a substrate including a cell region including a bit line structure, a bit line spacer and a lower electrode and a peripheral circuit region including first to third impurity regions, forming an interlayer insulating film on the peripheral circuit region, forming a first metal layer on the interlayer insulating film, forming a first trench and a second trench in the first metal layer between the first and second impurity regions, the second trench is disposed between the second and third impurity regions and exposes the interlayer insulating film, forming a first capping pattern on the first trench to form an air gap in the first trench, filling the second trench with a first insulating material, and forming, on the first metal layer, a contact connected to the third impurity region.

Abstract: A semiconductor apparatus includes a detection voltage generation circuit configured to generate a first detection voltage and a second detection voltage of which voltage levels are varied according to characteristics of a PMOS transistor and an NMOS transistor in response to a detection enable signal, a code generation circuit configured to generate a detection code in response to the voltage levels of the first and second detection voltages, a reference voltage generation circuit configured to generate a reference voltage in response to the detection code, an internal voltage generation circuit configured to generate an internal voltage in response to the reference voltage, and an internal circuit configured to operate by receiving the internal voltage.

Abstract: A refresh time detection circuit and a semiconductor device including the same may be provided. The refresh time detection circuit may include a code generator configured to generate a code signal for detecting a refresh time. The refresh time detection circuit may include a latch circuit configured to generate a latch signal by latching the code signal according to a fail signal, and generate a pre-code signal and a post-code signal by latching each latch signal according to a pre-enable signal and a post-enable signal. The refresh time detection circuit may include a subtractor configured to output a refresh detection signal by performing subtraction between the pre-code signal and the post-code signal. The refresh time detection circuit may include a comparator configured to generate a detection signal by comparing the refresh detection signal with an offset signal based on the post-enable signal.

Abstract: A semiconductor apparatus includes a detection voltage generation circuit configured to generate a first detection voltage and a second detection voltage of which voltage levels are varied according to characteristics of a PMOS transistor and an NMOS transistor in response to a detection enable signal, a code generation circuit configured to generate a detection code in response to the voltage levels of the first and second detection voltages, a reference voltage generation circuit configured to generate a reference voltage in response to the detection code, an internal voltage generation circuit configured to generate an internal voltage in response to the reference voltage, and an internal circuit configured to operate by receiving the internal voltage.

Abstract: A semiconductor memory device includes an oscillating signal generation section suitable for generating an oscillation signal oscillating with a period, which is defined by a predetermined temperature-period function, a period control section suitable for controlling the period of the oscillation signal according to a combination of two or more predetermined temperature-period functions, which are different from one another, in response to a refresh characteristic information, and a memory cell array suitable for performing a refresh operation in response to the oscillation signal.

Abstract: Disclosed herein are an audio apparatus and method for inducing a brainwave using a binaural beat, including a frequency shift unit for receiving a first audio sound source signal and generating a second audio sound source signal by shifting some of the frequency band of the first audio sound source signal by a specific frequency, and an audio output unit connected to the frequency shift unit, for outputting first and second audio output signals corresponding to the first and the second audio sound source signals. Accordingly, a user can hear a music signal or an audio signal for learning without being aware of the distortion of a sound source and can change his or her brainwave state without resistance or monotonousness because a required brainwave state is changed by applying a binaural beat to a specific frequency band of an audio signal, in particular, a music signal.

Abstract: A semiconductor device includes a temperature code latch circuit and a period selection circuit. The temperature code latch circuit latches a count code having a logic level combination corresponding to an internal temperature to output the latched count code as a temperature code. The period selection circuit selects a period of a refresh signal in response to the temperature code. A period variation rate of the refresh signal according to variation of the internal temperature is controlled by a first gradient selection signal in a first temperature section and is controlled by a second gradient selection signal in a second temperature section.