Patents by Inventor Oviso Dominador Jr. Fortaleza

Oviso Dominador Jr. Fortaleza has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10763133
    Abstract: A semiconductor structure for manufacturing a semiconductor package device is provided. The semiconductor structure includes a carrier and a dielectric layer. The carrier has a first surface and a second surface opposite to the first surface. The carrier includes an inner core layer and an exterior clad layer, and the inner core layer is covered by the exterior clad layer. The dielectric layer is formed on the first surface of the carrier. The carrier supports the dielectric layer.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: September 1, 2020
    Assignee: ADVANPACK SOLUTIONS PTE LTD.
    Inventors: Jimmy Hwee-Seng Chew, Kian-Hock Lim, Oviso Dominador Jr. Fortaleza, Shoa-Siong Lim
  • Patent number: 10109503
    Abstract: A semiconductor structure and a manufacturing method of the same are provided. The semiconductor structure includes a carrier. The carrier has a first surface and a second surface opposite to the first surface. The carrier includes an inner core layer and an exterior clad layer, and the inner core layer is covered by the exterior clad layer.
    Type: Grant
    Filed: July 23, 2012
    Date of Patent: October 23, 2018
    Assignee: ADVANPACK SOLUTIONS PTE LTD.
    Inventors: Jimmy Hwee-Seng Chew, Oviso Dominador Jr Fortaleza, Kian-Hock Lim, Shoa-Siong Lim
  • Publication number: 20160118349
    Abstract: A semiconductor package includes a dielectric layer, a plurality of traces, a plurality of electrical pads, a plurality of studs and at least a semiconductor device. The dielectric layer has a first dielectric surface and a second dielectric surface opposite the first dielectric surface. The traces are disposed in the dielectric layer and are exposed on the second dielectric surface. The electrical pads are disposed on the first dielectric surface. The studs are disposed in the dielectric layer and are exposed on the first dielectric surface. The studs are electrically connected to the traces and the electrical pads. The semiconductor device is disposed on the second dielectric surface and electrically connected to the traces.
    Type: Application
    Filed: December 7, 2015
    Publication date: April 28, 2016
    Applicant: ADVANPACK SOLUTIONS PTE LTD.
    Inventors: Hwee-Seng Jimmy CHEW, Kian-Hock LIM, Oviso Dominador Jr FORTALEZA, Shoa-Siong Raymond LIM
  • Patent number: 9219027
    Abstract: The semiconductor device carrier comprises a conductive carrier, a dielectric layer, a conductive trace layer, a conductive stud layer and the plating conductive layer. The conductive carrier comprises at least one cavity. The dielectric layer has a first dielectric surface and a second dielectric surface opposite the first dielectric surface. The conductive trace layer disposes in the dielectric layer and is exposed on the second dielectric surface. The conductive stud layer disposes in the dielectric layer and is exposed on the first dielectric surface, wherein the conductive stud layer is electrically connected to the conductive trace layer. The plating conductive layer is disposed on the first dielectric surface and the exposed conductive stud layer. The cavity exposes the conductive trace layer and the dielectric layer.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: December 22, 2015
    Assignee: ADVANPACK SOLUTIONS PTE LTD.
    Inventors: Hwee-Seng Jimmy Chew, Kian-Hock Lim, Oviso Dominador Jr Fortaleza, Shoa-Siong Raymond Lim
  • Publication number: 20140167240
    Abstract: The semiconductor device carrier comprises a conductive carrier, a dielectric layer, a conductive trace layer, a conductive stud layer and the plating conductive layer. The conductive carrier comprises at least one cavity. The dielectric layer has a first dielectric surface and a second dielectric surface opposite the first dielectric surface. The conductive trace layer disposes in the dielectric layer and is exposed on the second dielectric surface. The conductive stud layer disposes in the dielectric layer and is exposed on the first dielectric surface, wherein the conductive stud layer is electrically connected to the conductive trace layer. The plating conductive layer is disposed on the first dielectric surface and the exposed conductive stud layer. The cavity exposes the conductive trace layer and the dielectric layer.
    Type: Application
    Filed: February 20, 2014
    Publication date: June 19, 2014
    Applicant: ADVANPACK SOLUTIONS PTE LTD.
    Inventors: Hwee-Seng Jimmy Chew, Kian-Hock LIM, Oviso Dominador Jr Fortaleza, Shoa-Siong Raymond Lim
  • Patent number: 8709874
    Abstract: A conductive carrier having a first surface and a second surface is provided. The conductive trace layer is formed on the second surface of the conductive carrier. A conductive stud layer is formed on the conductive trace layer. A dielectric layer is formed on the conductive layer to encapsulate the conductive trace layer and the conductive stud layer. The conductive stud layer is exposed. A plating conductive layer is formed to envelop the conductive carrier, the dielectric layer and the exposed end of the conductive stud layer. A cavity is formed on the conductive carrier, wherein the conductive trace layer and the dielectric layer are exposed in the cavity. A surface finishing is formed on at least an exposed portion of the conductive stud layer. The plating conductive layer is removed.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: April 29, 2014
    Assignee: Advanpack Solutions Pte Ltd.
    Inventors: Hwee-Seng Jimmy Chew, Kian-Hock Lim, Oviso Dominador Jr Fortaleza, Shoa-Siong Raymond Lim
  • Publication number: 20130020710
    Abstract: A semiconductor structure and a manufacturing method of the same are provided. The semiconductor structure includes a carrier. The carrier has a first surface and a second surface opposite to the first surface. The carrier includes an inner core layer and an exterior clad layer, and the inner core layer is covered by the exterior clad layer.
    Type: Application
    Filed: July 23, 2012
    Publication date: January 24, 2013
    Applicant: ADVANPACK SOLUTIONS PTE LTD.
    Inventors: Jimmy Hwee-Seng Chew, Oviso Dominador Jr. Fortaleza, Kian-Hock Lim, Shoa-Siong Lim