Patents by Inventor Owen N. Parry

Owen N. Parry has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9531807
    Abstract: Methods and systems for configuring network storage are presented. A method for configuring network storage may include: detecting one more connection rates associated with one or more input PHYs associated with one or more parent devices; detecting a number of input connections associated with one or more PHYs associated with one or more parent devices; setting one or more connection rates associated with one or more input PHYs associated with one or more child devices according to the one or more connection rates associated with the one or more input PHYs associated with the one or more parent devices; and setting a number of input connections associated with one or more PHYs associated with one or more child devices according to a number of input connections associated with one or more PHYs associated with one or more parent devices.
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: December 27, 2016
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Owen N. Parry, Minjen Wang, Brad Besmer
  • Publication number: 20100281172
    Abstract: Methods and systems for configuring network storage are presented. A method for configuring network storage may include: detecting one more connection rates associated with one or more input PHYs associated with one or more parent devices; detecting a number of input connections associated with one or more PHYs associated with one or more parent devices; setting one or more connection rates associated with one or more input PHYs associated with one or more child devices according to the one or more connection rates associated with the one or more input PHYs associated with the one or more parent devices; and setting a number of input connections associated with one or more PHYs associated with one or more child devices according to a number of input connections associated with one or more PHYs associated with one or more parent devices.
    Type: Application
    Filed: April 30, 2009
    Publication date: November 4, 2010
    Inventors: Owen N. Parry, Minjen Wang, Brad Besmer
  • Patent number: 7054972
    Abstract: An apparatus and method for dynamically enabling and disabling interrupt coalescing in a data processing system. The present invention involves consistently monitoring IO load on an IOP of an IO adapter. The firmware on the IO adapter may have a global variable that stores counters for PCI function registers. Each counter tracks the number of outstanding IOs of a corresponding PCI function register. The counter is incremented whenever a new IO is received and is decremented upon posting the completed message back to the OS. A timer interrupt is generated periodically so that an ISR may be periodically performed. In the ISR, the maximum value stored of each counter seen since last timer interrupt is analyzed. When the maximum value stored is greater than a predetermined threshold value, the interrupt coalescing is enabled.
    Type: Grant
    Filed: December 13, 2002
    Date of Patent: May 30, 2006
    Assignee: LSI Logic Corporation
    Inventors: Owen N. Parry, Brad D. Besmer, Stephen B. Johnson
  • Publication number: 20040117534
    Abstract: An apparatus and method for dynamically enabling and disabling interrupt coalescing in a data processing system. The present invention involves consistently monitoring IO load on an IOP of an IO adapter. The firmware on the IO adapter may have a global variable that stores counters for PCI function registers. Each counter tracks the number of outstanding IOs of a corresponding PCI function register. The counter is incremented whenever a new IO is received and is decremented upon posting the completed message back to the OS. A timer interrupt is generated periodically so that an ISR may be periodically performed. In the ISR, the maximum value stored of each counter seen since last timer interrupt is analyzed. When the maximum value stored is greater than a predetermined threshold value, the interrupt coalescing is enabled.
    Type: Application
    Filed: December 13, 2002
    Publication date: June 17, 2004
    Inventors: Owen N. Parry, Brad D. Besmer, Stephen B. Johnson