Patents by Inventor Ozdal Barkan
Ozdal Barkan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9267984Abstract: Aspects of the present disclosure provide for a cable tester that tests a cable to determine the cable length. The cable tester can include a clock generator that generates a clock that has clock period that is a multiple of the data symbol period and a signal generator that injects the training signal, which can be synchronous with the clock, into the cable. The cable tester can also include a receiver that samples the returned signal from the cable and adaptively filters the returned signal based on the training signal and a controller that determines the cable length from the adaptive filter tap coefficients.Type: GrantFiled: March 7, 2014Date of Patent: February 23, 2016Assignee: Marvell World Trade Ltd.Inventors: Ozdal Barkan, William Lo, Tak-Lap Tsui
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Patent number: 9148200Abstract: A system and method of determining an unbalanced current condition in Power over Ethernet applications are disclosed. In some implementations, a user or network administrator may be notified of potential impairments due to unbalanced current.Type: GrantFiled: November 18, 2013Date of Patent: September 29, 2015Assignee: Marvell International Ltd.Inventors: Tak-Lap Tsui, Runsheng He, Ozdal Barkan, Dance Wu
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Patent number: 9054823Abstract: A networking device includes a plurality of network ports and a clock synchronizer. Each network port is configured to receive a respective signal over a respective physical medium. A selected network port is configured to recover a clock signal from the respective signal received by the selected network port. Each of the network ports is configured to be selectable as the selected network port. The clock synchronizer is configured to generate a transmit clock signal in response to the clock signal recovered by the selected network port. The selected network port is configured to transmit data over the respective physical medium according to a local clock signal generated by a clock signal generator local to the networking device. Each network port other than the selected network port is configured to transmit data over the respective physical medium according to the transmit clock signal generated by the clock synchronizer.Type: GrantFiled: July 16, 2013Date of Patent: June 9, 2015Assignee: Marvell World Trade Ltd.Inventor: Ozdal Barkan
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Patent number: 8982906Abstract: A system including a first interface module, a second interface module, and a first physical layer device. The first interface module is configured to interface to a copper medium. The second interface module is configured to interface to a fiber-optic medium. The second interface module is configured to interface to the fiber-optic medium via a small form-factor pluggable (SFP) interface module. The first physical layer device is configured to detect when a link is being established over the copper medium via the first interface module and, in response to detecting that the link is established over the copper medium via the first interface module, to deactivate (i) the second interface module and (ii) the SFP interface module.Type: GrantFiled: June 19, 2013Date of Patent: March 17, 2015Assignee: Marvell International Ltd.Inventor: Ozdal Barkan
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Patent number: 8837468Abstract: A network device including a physical layer device and a media access controller. The physical layer device includes a first interface, and is configured to receive packets including a first packet and a second packet. The media access controller includes a second interface connected to the first interface of the physical layer device. The physical layer device is configured to: in response to the first packet, generate a power signal; transition at least one of the first interface and the second interface from being powered OFF to being powered ON; and output the power signal to the media access controller. The media access controller is configured to: receive the power signal; in response to the power signal, transition from being powered OFF to being powered ON; and subsequent to being powered ON, receive the second packet from the physical layer device via the first interface and the second interface.Type: GrantFiled: December 28, 2012Date of Patent: September 16, 2014Assignee: Marvell International Ltd.Inventors: William Lo, Ozdal Barkan
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Patent number: 8824502Abstract: A network interface module includes a physical layer module and a data rate module. The physical layer module is configured to transmit first signals to a network device via a cable at a first data rate while conforming to Ethernet baseband characteristics for the first data rate, and at least one of determine a characteristic of the cable, or perform an autonegotiation process with the network device. The data rate module is configured to select a second data rate based on at least one of the characteristic of the cable, or results of the autonegotiation process. The second data rate is slower than the first data rate. The physical layer module is configured to transmit second signals to the network device at the second data rate while conforming to the Ethernet baseband characteristics for the first data rate.Type: GrantFiled: August 14, 2012Date of Patent: September 2, 2014Assignee: Marvell World Trade Ltd.Inventors: Ozdal Barkan, Nafea Bishara, William Lo
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Patent number: 8705416Abstract: An apparatus including a port to transmit first frames and receive second frames over a communication channel, the port including a collision detect circuit and a duplex mismatch circuit. The collision detect circuit detects collisions on the communication channel between the first frames and the second frames. The duplex mismatch circuit declares a duplex mismatch when the communication channel was established without attempting auto-negotiation, the port is in a half-duplex mode, and the collision detect circuit detects a very late collision involving one of the first frames. The very late collision occurs after a predetermined amount of data has been transmitted in the one of the first frames. The duplex mismatch indicates that a full-duplex mode is used with respect to the second frames.Type: GrantFiled: December 9, 2011Date of Patent: April 22, 2014Assignee: Marvell World Trade, Ltd.Inventors: Donald Pannell, Ozdal Barkan
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Patent number: 8669767Abstract: Aspects of the present disclosure provide for a cable tester that tests a cable to determine the cable length. The cable tester can include a clock generator that generates a clock that has clock period that is a multiple of the data symbol period and a signal generator that injects the training signal, which can be synchronous with the clock, into the cable. The cable tester can also include a receiver that samples the returned signal from the cable and adaptively filters the returned signal based on the training signal and a controller that determines the cable length from the adaptive filter tap coefficients.Type: GrantFiled: August 5, 2013Date of Patent: March 11, 2014Assignee: Marvell International Ltd.Inventors: Ozdal Barkan, William Lo, Tak-Lap Tsui
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Patent number: 8670335Abstract: Reduced power transmission is described. In embodiments, networked devices communicate via a network connection. A characteristic of the network connection between the networked devices can be determined, and an output amplitude of a signal that is indicative of the communications between the network devices can be adjusted based on the characteristic of the network connection. Power consumption that is utilized for the communications between the network devices is reduced based on the adjustment of the output amplitude of the signal.Type: GrantFiled: March 31, 2009Date of Patent: March 11, 2014Assignee: Marvell World Trade Ltd.Inventors: Ozdal Barkan, Tak-Lap Tsui
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Patent number: 8588705Abstract: A system and method of determining an unbalanced current condition in Power over Ethernet applications are disclosed. In some implementations, a user or network administrator may be notified of potential impairments due to unbalanced current.Type: GrantFiled: November 25, 2008Date of Patent: November 19, 2013Assignee: Marvell International Ltd.Inventors: Tak-Lap Tsui, Runsheng He, Ozdal Barkan, Dance Wu
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Publication number: 20130301657Abstract: A networking device includes a plurality of network ports and a clock synchronizer. Each network port is configured to receive a respective signal over a respective physical medium. A selected network port is configured to recover a clock signal from the respective signal received by the selected network port. Each of the network ports is configured to be selectable as the selected network port. The clock synchronizer is configured to generate a transmit clock signal in response to the clock signal recovered by the selected network port. The selected network port is configured to transmit data over the respective physical medium according to a local clock signal generated by a clock signal generator local to the networking device. Each network port other than the selected network port is configured to transmit data over the respective physical medium according to the transmit clock signal generated by the clock synchronizer.Type: ApplicationFiled: July 16, 2013Publication date: November 14, 2013Inventor: Ozdal BARKAN
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Patent number: 8513952Abstract: Aspects of the present disclosure provide for a cable tester that tests a cable to determine the cable length. The cable tester can include a clock generator that generates a clock that has clock period that is a multiple of the data symbol period and a signal generator that injects the training signal, which can be synchronous with the clock, into the cable. The cable tester can also include a receiver that samples the returned signal from the cable and adaptively filters the returned signal based on the training signal and a controller that determines the cable length from the adaptive filter tap coefficients.Type: GrantFiled: December 9, 2008Date of Patent: August 20, 2013Assignee: Marvell International Ltd.Inventors: Ozdal Barkan, William Lo, Tak-Lap Tsui
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Patent number: 8488699Abstract: A physical layer device including a plurality of ports and a clock synchronization module. Each port of the plurality of ports is programmable to receive a grandmaster clock. The clock synchronization module is configured to i) receive the grandmaster clock from a first port of the plurality of ports (wherein the first port has been programmed to receive the grandmaster clock), and ii) clean up the grandmaster clock, wherein cleaning up the grandmaster clock includes one or more of removing jitter from the grandmaster clock, controlling a voltage swing or the grandmaster clock, or establishing fixed edge rates of the grandmaster clock. Other ones of the plurality of ports, not including the first port, are programmed to receive the cleaned up grandmaster clock for use when transmitting data.Type: GrantFiled: August 22, 2011Date of Patent: July 16, 2013Assignee: Marvell World Trade Ltd.Inventor: Ozdal Barkan
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Patent number: 8472470Abstract: An apparatus including a first interface module, a second interface module, and a first physical layer device. The first interface module is configured to interface the apparatus to a copper medium. The second interface module is configured to interface the apparatus to a fiber-optic medium. The first physical layer device is configured to generate a control signal in response to establishing a link over the copper medium via the first interface module. The control signal (i) activates a link indicator to indicate status of the link over the copper medium and (ii) deactivates the second interface module.Type: GrantFiled: October 18, 2010Date of Patent: June 25, 2013Assignee: Marvell International Ltd.Inventor: Ozdal Barkan
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Patent number: 8345673Abstract: Apparatus having corresponding methods comprise: a physical-layer input circuit to receive first signals representing first data; a first serializer to transmit a serial stream of the first data; and a magic packet circuit to generate a magic packet signal when the first data includes a magic packet.Type: GrantFiled: January 9, 2008Date of Patent: January 1, 2013Assignee: Marvell International, Ltd.Inventors: William Lo, Ozdal Barkan
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Publication number: 20120314716Abstract: A physical-layer device includes a cable measurement module, a data rate module and a physical-layer device core. The cable measurement module measures characteristics of a cable. The data rate module (i) selects a data rate divisor N based on the characteristics of the cable, and (ii) reduces a rate of a first clock based on the data rate divisor N, where N is greater than 1. The physical-layer device core includes: a transmit module that transmits first signals over the cable at a data rate of M/N Gbps based on the rate of the first clock, where M is an integer; and a receive module that receives second signals over the cable at the data rate of M/N Gbps based on the rate of the first clock. The first and second signals conform to 1000BASE-T when M=1. The first and signals conform to 10GBASE-T when M=10.Type: ApplicationFiled: August 14, 2012Publication date: December 13, 2012Inventors: Ozdal Barkan, Nafea Bishara, William Lo
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Patent number: 8243752Abstract: A physical-layer device (PHY) having corresponding methods comprises: a data rate module to select a data rate divisor N, where N is at least one of a positive integer, or a real number greater than, or equal to, 1; and a PHY core comprising a PHY transmit module to transmit first signals a data rate of M/N Gbps, and a PHY receive module to receive second signals at the data rate of M/N Gbps; wherein the first and second signals conform to at least one of 1000BASE-T, wherein M=1, and 10GBASE-T, wherein M=10.Type: GrantFiled: December 9, 2008Date of Patent: August 14, 2012Assignee: Marvell World Trade Ltd.Inventors: Ozdal Barkan, Nafea Bishara, William Lo
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Patent number: 8156359Abstract: Low-power idle mode for network transceivers. In one aspect, a method for reducing power consumption of a transceiver connected to a communication network includes entering a low-power idle mode, and in this mode, repeatedly turning off a transmitter of the transceiver and turning on the transmitter according to a pattern, where the pattern has been customized based on characteristics of the receiver. Turning off the transmitter conserves power consumed by the transceiver.Type: GrantFiled: September 21, 2009Date of Patent: April 10, 2012Assignee: Aquantia CorporationInventors: Hossein Sedarat, Ozdal Barkan, William Woodruff
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Publication number: 20120076057Abstract: An apparatus including a port to transmit first frames and receive second frames over a communication channel, the port including a collision detect circuit and a duplex mismatch circuit. The collision detect circuit detects collisions on the communication channel between the first frames and the second frames. The duplex mismatch circuit declares a duplex mismatch when the communication channel was established without attempting auto-negotiation, the port is in a half-duplex mode, and the collision detect circuit detects a very late collision involving one of the first frames. The very late collision occurs after a predetermined amount of data has been transmitted in the one of the first frames. The duplex mismatch indicates that a full-duplex mode is used with respect to the second frames.Type: ApplicationFiled: December 9, 2011Publication date: March 29, 2012Inventors: Donald Pannell, Ozdal Barkan
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Patent number: 8089907Abstract: An apparatus including a port to transmit first frames and receive second frames over a communication channel, the port including a collision detect circuit and a duplex mismatch circuit. The collision detect circuit detects collisions on the communication channel between the first frames and the second frames. The duplex mismatch circuit declares a duplex mismatch when the communication channel was established without attempting auto-negotiation, the port is in a half-duplex mode, and the collision detect circuit detects a very late collision involving one of the first frames. The very late collision occurs after a predetermined amount of data has been transmitted in the one of the first frames. The duplex mismatch indicates that a full-duplex mode is used with respect to the second frames.Type: GrantFiled: September 19, 2006Date of Patent: January 3, 2012Assignee: Marvell World Trade Ltd.Inventors: Donald Pannell, Ozdal Barkan