Abstract: Techniques and mechanisms for accessing memory arrays which are formed in a back end of line (BEOL) of an integrated circuit (IC) die. In an embodiment, a differential sense amplifier of the IC die is coupled to a first array and a second array via a first bit line and a second bit line, respectively. The first bit line and the second bit line extend from a first level of BEOL memory arrays, toward a front end of line (FEOL) of the IC die, on opposite respective sides of first array, wherein the differential sense amplifier is in a footprint region for the first memory array. In another embodiment, a word line driver circuit comprises a two stage charger-discharger circuit which mitigates hot carrier injection.

Abstract: Methods and systems are provided for allocating transmitting power and scheduling packets in one or more cells of a wireless communication system or network. The wireless communication system has a plurality of wireless cells. Each of the wireless cells includes a base station and a plurality of wireless stations. The method includes determining a channel gain for each preselected wireless station in the first wireless cell. Intercell interference experienced within the first wireless cell caused by the other wireless cells is determined. A power allocation and scheduling scheme is determined, based on the determined channel gains and the determined intercell interference. Transmitting power values and corresponding transmitting time durations within the first wireless cell are assigned, based on the scheme to improve total throughput in the first wireless cell.