Patents by Inventor P. Jeffrey Ungar
P. Jeffrey Ungar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12340164Abstract: Systems for reticle enhancement technology (RET) for use with variable shaped beam (VSB) lithography include a device configured to determine an initial mask pattern from a desired pattern for a substrate; a device configured to calculate a first substrate pattern from the initial mask pattern; a device configured to determine an initial set of VSB shots based on the initial mask pattern; a device configured to calculate a second substrate pattern from a simulated mask pattern calculated with the initial set of VSB shots; a device configured to compare the first substrate pattern with the second substrate pattern; and a device configured to adjust the initial set of VSB shots until the second substrate pattern and the first substrate pattern are within a predetermined tolerance, creating an adjusted set of VSB shots.Type: GrantFiled: May 7, 2024Date of Patent: June 24, 2025Assignee: D2S, Inc.Inventors: Akira Fujimura, P. Jeffrey Ungar, Nagesh Shirali
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Patent number: 12248242Abstract: Methods and systems for fracturing a pattern to be exposed on a surface using variable shaped beam (VSB) lithography include inputting an initial pattern; calculating a first substrate pattern from the initial pattern; overlaying the initial pattern with a two-dimensional grid, wherein an initial set of VSB shots are formed by a union of the initial pattern with locations on the grid; and merging two or more adjacent shots in the initial set of VSB shots to create a larger shot in a modified set of VSB shots; and outputting the modified set of VSB shots. The methods and systems also include calculating a calculated pattern to be exposed on the surface with the modified set of VSB shots; and calculating a second substrate pattern from the calculated pattern to be exposed on the surface.Type: GrantFiled: March 11, 2024Date of Patent: March 11, 2025Assignee: D2S, Inc.Inventors: Akira Fujimura, P. Jeffrey Ungar, Nagesh Shirali
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Publication number: 20240289532Abstract: Systems for reticle enhancement technology (RET) for use with variable shaped beam (VSB) lithography include a device configured to determine an initial mask pattern from a desired pattern for a substrate; a device configured to calculate a first substrate pattern from the initial mask pattern; a device configured to determine an initial set of VSB shots based on the initial mask pattern; a device configured to calculate a second substrate pattern from a simulated mask pattern calculated with the initial set of VSB shots; a device configured to compare the first substrate pattern with the second substrate pattern; and a device configured to adjust the initial set of VSB shots until the second substrate pattern and the first substrate pattern are within a predetermined tolerance, creating an adjusted set of VSB shots.Type: ApplicationFiled: May 7, 2024Publication date: August 29, 2024Applicant: D2S, Inc.Inventors: Akira Fujimura, P. Jeffrey Ungar, Nagesh Shirali
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Publication number: 20240220695Abstract: Methods for reticle enhancement technology include inputting a target wafer pattern, the target wafer pattern spanning an entire design area, and iterating a proposed mask for the entire design area until the proposed mask meets criteria towards producing the target wafer pattern. Each iteration includes calculating a predicted wafer pattern from the proposed mask. The calculating comprises calculating a cost and derivative data, the cost and the derivative data being based on comparing the predicted wafer pattern to the target wafer pattern. The cost further comprises specifications for mask manufacturability.Type: ApplicationFiled: March 15, 2024Publication date: July 4, 2024Applicant: D2S, Inc.Inventor: P. Jeffrey Ungar
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Publication number: 20240210815Abstract: Methods and systems for fracturing a pattern to be exposed on a surface using variable shaped beam (VSB) lithography include inputting an initial pattern; calculating a first substrate pattern from the initial pattern; overlaying the initial pattern with a two-dimensional grid, wherein an initial set of VSB shots are formed by a union of the initial pattern with locations on the grid; and merging two or more adjacent shots in the initial set of VSB shots to create a larger shot in a modified set of VSB shots; and outputting the modified set of VSB shots. The methods and systems also include calculating a calculated pattern to be exposed on the surface with the modified set of VSB shots; and calculating a second substrate pattern from the calculated pattern to be exposed on the surface.Type: ApplicationFiled: March 11, 2024Publication date: June 27, 2024Applicant: D2S, Inc.Inventors: Akira Fujimura, P. Jeffrey Ungar, Nagesh Shirali
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Patent number: 12019973Abstract: Methods for reticle enhancement technology (RET) for use with variable shaped beam (VSB) lithography include determining an initial mask pattern from a desired pattern for a substrate; calculating a first substrate pattern from the initial mask pattern; determining an initial set of VSB shots that will form the initial mask pattern; calculating a simulated mask pattern from the initial set of VSB shots; calculating a second substrate pattern from the simulated mask pattern; and adjusting the initial set of VSB shots, wherein the adjusting of the initial set of VSB shots creates an adjusted set of VSB shots.Type: GrantFiled: May 16, 2023Date of Patent: June 25, 2024Assignee: D2S, Inc.Inventors: Akira Fujimura, P. Jeffrey Ungar, Nagesh Shirali
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Patent number: 11972187Abstract: Methods for reticle enhancement technology include representing a target wafer pattern or a predicted wafer pattern as a smooth function captured as a function sample array (FSA). The FSA is an array of sampled values of the smooth function, which is a continuous differentiable function. Methods also include providing a continuous tone mask (CTM), wherein the CTM is used to produce the predicted wafer pattern, the predicted wafer pattern spanning an entire design area.Type: GrantFiled: February 27, 2023Date of Patent: April 30, 2024Assignee: D2S, Inc.Inventor: P. Jeffrey Ungar
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Patent number: 11953824Abstract: Methods for fracturing a pattern to be exposed on a surface using variable shaped beam (VSB) lithography include inputting an initial pattern; calculating a first substrate pattern from the initial pattern; overlaying the initial pattern with a two-dimensional grid, wherein an initial set of VSB shots are formed by a union of the initial pattern with locations on the grid; and merging two or more adjacent shots in the initial set of VSB shots to create a larger shot in a modified set of VSB shots; and outputting the modified set of VSB shots. The method also includes calculating a calculated pattern to be exposed on the surface with the modified set of VSB shots; and calculating a second substrate pattern from the calculated pattern to be exposed on the surface.Type: GrantFiled: May 16, 2023Date of Patent: April 9, 2024Assignee: D2S, Inc.Inventors: Akira Fujimura, P. Jeffrey Ungar, Nagesh Shirali
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Publication number: 20240086607Abstract: Methods and systems for reticle enhancement technology (RET) include inputting a target wafer pattern, where the target wafer pattern spans an entire design area. The entire design area is divided into a plurality of tiles, each tile having a halo region surrounding the tile. An optimized mask is calculated, wherein the optimized mask is generated by a first trained neural network using the target wafer patter. The calculating is performed for each tile in the plurality of tiles including its halo region.Type: ApplicationFiled: November 20, 2023Publication date: March 14, 2024Applicant: D2S, Inc.Inventors: P. Jeffrey Ungar, Akira Fujimura, Ajay Baranwal, Suhas Pillai
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Patent number: 11783110Abstract: Methods for reticle enhancement technology (RET) for use with variable shaped beam (VSB) lithography include inputting a desired pattern to be formed on a substrate; determining an initial mask pattern from the desired pattern for the substrate; optimizing the initial mask pattern for wafer quality using a VSB exposure system; and outputting the optimized mask pattern. Methods for fracturing a pattern to be exposed on a surface using VSB lithography include inputting an initial pattern; overlaying the initial pattern with a two-dimensional grid, wherein an initial set of VSB shots are formed by the union of the initial pattern with locations on the grid; merging two or more adjacent shots in the initial set of VSB shots to create a larger shot in a modified set of VSB shots; and outputting the modified set of VSB shots.Type: GrantFiled: July 30, 2021Date of Patent: October 10, 2023Assignee: D2S, Inc.Inventors: Akira Fujimura, P. Jeffrey Ungar, Nagesh Shirali
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Publication number: 20230288796Abstract: Methods for fracturing a pattern to be exposed on a surface using variable shaped beam (VSB) lithography include inputting an initial pattern; calculating a first substrate pattern from the initial pattern; overlaying the initial pattern with a two-dimensional grid, wherein an initial set of VSB shots are formed by a union of the initial pattern with locations on the grid; and merging two or more adjacent shots in the initial set of VSB shots to create a larger shot in a modified set of VSB shots; and outputting the modified set of VSB shots. The method also includes calculating a calculated pattern to be exposed on the surface with the modified set of VSB shots; and calculating a second substrate pattern from the calculated pattern to be exposed on the surface.Type: ApplicationFiled: May 16, 2023Publication date: September 14, 2023Applicant: D2S, Inc.Inventors: Akira Fujimura, P. Jeffrey Ungar, Nagesh Shirali
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Publication number: 20230289510Abstract: Methods for reticle enhancement technology (RET) for use with variable shaped beam (VSB) lithography include determining an initial mask pattern from a desired pattern for a substrate; calculating a first substrate pattern from the initial mask pattern; determining an initial set of VSB shots that will form the initial mask pattern; calculating a simulated mask pattern from the initial set of VSB shots; calculating a second substrate pattern from the simulated mask pattern; and adjusting the initial set of VSB shots, wherein the adjusting of the initial set of VSB shots creates an adjusted set of VSB shots.Type: ApplicationFiled: May 16, 2023Publication date: September 14, 2023Applicant: D2S, Inc.Inventors: Akira Fujimura, P. Jeffrey Ungar, Nagesh Shirali
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Patent number: 11693306Abstract: Methods for reticle enhancement technology (RET) for use with variable shaped beam (VSB) lithography include inputting a desired pattern to be formed on a substrate; determining an initial mask pattern from the desired pattern for the substrate; optimizing the initial mask pattern for wafer quality using a VSB exposure system; and outputting the optimized mask pattern. Methods for fracturing a pattern to be exposed on a surface using VSB lithography include inputting an initial pattern; overlaying the initial pattern with a two-dimensional grid, wherein an initial set of VSB shots are formed by the union of the initial pattern with locations on the grid; merging two or more adjacent shots in the initial set of VSB shots to create a larger shot in a modified set of VSB shots; and outputting the modified set of VSB shots.Type: GrantFiled: July 30, 2021Date of Patent: July 4, 2023Assignee: D2S, Inc.Inventors: Akira Fujimura, P. Jeffrey Ungar, Nagesh Shirali
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Publication number: 20230205961Abstract: Methods for reticle enhancement technology include representing a target wafer pattern or a predicted wafer pattern as a smooth function captured as a function sample array (FSA). The FSA is an array of sampled values of the smooth function, which is a continuous differentiable function. Methods also include providing a continuous tone mask (CTM), wherein the CTM is used to produce the predicted wafer pattern, the predicted wafer pattern spanning an entire design area.Type: ApplicationFiled: February 27, 2023Publication date: June 29, 2023Applicant: D2S, Inc.Inventor: P. Jeffrey Ungar
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Patent number: 11620425Abstract: Methods for iteratively optimizing a two-dimensioned tiled area such as a lithographic mask include determining a halo area around each tile in the tiled area. An extended tile is made of a tile and a halo area. Each extended tile in the tiled area is iterated until a criterion is satisfied or a maximum number of iterations is met. Optimizing the extended tile produces a pattern for the tile such that at a perimeter of the tile, the pattern matches adjacent patterns that are calculated at perimeters of adjacent tiles.Type: GrantFiled: February 28, 2022Date of Patent: April 4, 2023Assignee: D2S, Inc.Inventors: P. Jeffrey Ungar, Hironobu Matsumoto
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Publication number: 20230034170Abstract: Methods for reticle enhancement technology (RET) for use with variable shaped beam (VSB) lithography include inputting a desired pattern to be formed on a substrate; determining an initial mask pattern from the desired pattern for the substrate; optimizing the initial mask pattern for wafer quality using a VSB exposure system; and outputting the optimized mask pattern. Methods for fracturing a pattern to be exposed on a surface using VSB lithography include inputting an initial pattern; overlaying the initial pattern with a two-dimensional grid, wherein an initial set of VSB shots are formed by the union of the initial pattern with locations on the grid; merging two or more adjacent shots in the initial set of VSB shots to create a larger shot in a modified set of VSB shots; and outputting the modified set of VSB shots.Type: ApplicationFiled: July 30, 2021Publication date: February 2, 2023Applicant: D2S, Inc.Inventors: Akira Fujimura, P. Jeffrey Ungar, Nagesh Shirali
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Publication number: 20230035090Abstract: Methods for reticle enhancement technology (RET) for use with variable shaped beam (VSB) lithography include inputting a desired pattern to be formed on a substrate; determining an initial mask pattern from the desired pattern for the substrate; optimizing the initial mask pattern for wafer quality using a VSB exposure system; and outputting the optimized mask pattern. Methods for fracturing a pattern to be exposed on a surface using VSB lithography include inputting an initial pattern; overlaying the initial pattern with a two-dimensional grid, wherein an initial set of VSB shots are formed by the union of the initial pattern with locations on the grid; merging two or more adjacent shots in the initial set of VSB shots to create a larger shot in a modified set of VSB shots; and outputting the modified set of VSB shots.Type: ApplicationFiled: July 30, 2021Publication date: February 2, 2023Applicant: D2S, Inc.Inventors: Akira Fujimura, P. Jeffrey Ungar, Nagesh Shirali
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Publication number: 20220180036Abstract: Methods for iteratively optimizing a two-dimensioned tiled area such as a lithographic mask include determining a halo area around each tile in the tiled area. An extended tile is made of a tile and a halo area. Each extended tile in the tiled area is iterated until a criterion is satisfied or a maximum number of iterations is met. Optimizing the extended tile produces a pattern for the tile such that at a perimeter of the tile, the pattern matches adjacent patterns that are calculated at perimeters of adjacent tiles.Type: ApplicationFiled: February 28, 2022Publication date: June 9, 2022Applicant: D2S, Inc.Inventors: P. Jeffrey Ungar, Hironobu Matsumoto
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Patent number: 11301610Abstract: Methods for iteratively optimizing a two-dimensioned tiled area such as a lithographic mask include determining a halo area around each tile in the tiled area. An extended tile is made of a tile and a halo area. Each extended tile in the tiled area is iterated until a criterion is satisfied or a maximum number of iterations is met. Optimizing the extended tile produces a pattern for the tile such that at a perimeter of the tile, the pattern matches adjacent patterns that are calculated at perimeters of adjacent tiles.Type: GrantFiled: January 20, 2021Date of Patent: April 12, 2022Assignee: D2S, Inc.Inventors: P. Jeffrey Ungar, Hironobu Matsumoto
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Publication number: 20210141988Abstract: Methods for iteratively optimizing a two-dimensioned tiled area such as a lithographic mask include determining a halo area around each tile in the tiled area. An extended tile is made of a tile and a halo area. Each extended tile in the tiled area is iterated until a criterion is satisfied or a maximum number of iterations is met. Optimizing the extended tile produces a pattern for the tile such that at a perimeter of the tile, the pattern matches adjacent patterns that are calculated at perimeters of adjacent tiles.Type: ApplicationFiled: January 20, 2021Publication date: May 13, 2021Applicant: D2S, Inc.Inventors: P. Jeffrey Ungar, Hironobu Matsumoto