Patents by Inventor P.Y. Chiang

P.Y. Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • LDMOS with independently biased source
    Publication number: 20070108517
    Abstract: A power metal-oxide semiconductor device provides an P-type base region that includes the N+ device source and is biased differently than the P-type substrate by application of an electrical load. In one embodiment, an LDMOS device with a NPN configuration is used but the coupling of the device source to the base contact prevents the NPN parasitic device from operating. The P-type base is formed in an N-well that separates the base from the P-type substrate and surrounding P-wells. Vertical punch-through is prevented by a high-impurity N+ buried layer that separates the N-well from the P-type substrate.
    Type: Application
    Filed: November 12, 2005
    Publication date: May 17, 2007
    Inventors: You-Kuo Wu, Fu-Hsin Chen, P.Y. Chiang, An-Min Chiang