Patents by Inventor PaLan Lee

PaLan Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9313889
    Abstract: Provided is a display apparatus. The display apparatus includes a display panel, a flexible circuit film having a rear surface connected to the display panel, and a front surface opposite to the rear surface, the front surface having a chip mounted thereon, and a first lead bonding portion electrically connecting the chip to the display panel. The first lead bonding portion includes a first portion connected to the chip and overlying a portion of the flexible circuit film, a second portion passing through the flexible circuit film, and a third portion disposed between the flexible circuit film and the display panel on the rear surface of the flexible circuit film, where the third portion overlaps the first portion.
    Type: Grant
    Filed: April 25, 2014
    Date of Patent: April 12, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyoungsuk Yang, Jeong-Kyu Ha, PaLan Lee, Narae Shin, Soyoung Lim, Jae-Min Jung, KyongSoon Cho
  • Publication number: 20140328031
    Abstract: Provided is a display apparatus. The display apparatus includes a display panel, a flexible circuit film having a rear surface connected to the display panel, and a front surface opposite to the rear surface, the front surface having a chip mounted thereon, and a first lead bonding portion electrically connecting the chip to the display panel. The first lead bonding portion includes a first portion connected to the chip and overlying a portion of the flexible circuit film, a second portion passing through the flexible circuit film, and a third portion disposed between the flexible circuit film and the display panel on the rear surface of the flexible circuit film, where the third portion overlaps the first portion.
    Type: Application
    Filed: April 25, 2014
    Publication date: November 6, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: KYOUNGSUK YANG, Jeong-Kyu HA, PaLan LEE, NARAE SHIN, Soyoung LIM, Jae-Min JUNG, KyongSoon CHO
  • Patent number: 8569114
    Abstract: Provided is a method of forming a semiconductor package. In the method, a first package including a first chip on a first substrate is formed, a second package including a second chip on a second substrate is formed, a molding cap provided with a via hole and a recess structure configured to receive the first chip is formed, and the second package is provided on the first package with the molding cap being therebetween such that the recess receives the first chip. The via hole and the recess structure are simultaneously formed.
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: October 29, 2013
    Assignee: Samsung Electronics Co. Ltd.
    Inventors: Choongbin Yim, Seungkon Mok, Donghan Kim, Jin-Woo Park, PaLan Lee, Mi-yeon Kim
  • Patent number: 8269342
    Abstract: A semiconductor package may include at least one semiconductor chip mounted on a substrate, a molding layer adapted to mold the at least one semiconductor chip, a heat slug, on the molding layer, having a structure in which a dielectric is provided between conductors, and a through mold via electrically connecting the heat slug to the substrate.
    Type: Grant
    Filed: June 1, 2010
    Date of Patent: September 18, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yonghoon Kim, Heeseok Lee, Eunseok Cho, Hyuna Kim, Soyoung Lim, PaLan Lee
  • Publication number: 20110018119
    Abstract: A semiconductor package may include at least one semiconductor chip mounted on a substrate, a molding layer adapted to mold the at least one semiconductor chip, a heat slug, on the molding layer, having a structure in which a dielectric is provided between conductors, and a through mold via electrically connecting the heat slug to the substrate.
    Type: Application
    Filed: June 1, 2010
    Publication date: January 27, 2011
    Inventors: Yonghoon Kim, Heeseok Lee, Eunseok Cho, Hyuna Kim, Soyoung Lim, PaLan Lee
  • Publication number: 20100304530
    Abstract: Provided is a method of forming a semiconductor package. In the method, a first package including a first chip on a first substrate is formed, a second package including a second chip on a second substrate is formed, a moulding cap provided with a via hole and a recess structure configured to receive the first chip is formed, and the second package is provided on the first package with the moulding cap being therebetween such that the recess receives the first chip. The via hole and the recess structure are simultaneously foamed.
    Type: Application
    Filed: May 27, 2010
    Publication date: December 2, 2010
    Inventors: Choongbin Yim, Seungkon Mok, Donghan Kim, Jin-Woo Park, PaLan Lee, Mi-yeon Kim