Patents by Inventor Pablo Limon
Pablo Limon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10436874Abstract: Systems and methods for calibration and operation of a source-measure unit (SMU). The system may include a functional unit and output terminals coupled to the functional unit. An excitation signal may be applied to a capacitor by the SMU. The capacitor may be included in a calibration circuit. The method may include obtaining one or more of a current calibration coefficient (CCC) or a voltage calibration coefficient (VCC). The CCC may correspond to a current-range setting and the VCC may correspond to a voltage-range setting. The CCC may be obtained from a value of a first current and a value of a second current developed in the capacitor responsive to the excitation signal. The VCC may be obtained from a value of a first voltage and a value of a second voltage developed across the capacitor responsive to the excitation signal.Type: GrantFiled: January 8, 2019Date of Patent: October 8, 2019Assignee: National Instruments CorporationInventors: Christopher G. Regier, Pablo Limon
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Publication number: 20190146050Abstract: Systems and methods for calibration and operation of a source-measure unit (SMU). The system may include a functional unit and output terminals coupled to the functional unit. An excitation signal may be applied to a capacitor by the SMU. The capacitor may be included in a calibration circuit. The method may include obtaining one or more of a current calibration coefficient (CCC) or a voltage calibration coefficient (VCC). The CCC may correspond to a current-range setting and the VCC may correspond to a voltage-range setting. The CCC may be obtained from a value of a first current and a value of a second current developed in the capacitor responsive to the excitation signal. The VCC may be obtained from a value of a first voltage and a value of a second voltage developed across the capacitor responsive to the excitation signal.Type: ApplicationFiled: January 8, 2019Publication date: May 16, 2019Inventors: Christopher G. Regier, Pablo Limon
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Patent number: 10175334Abstract: Systems and methods for calibration and operation of a source-measure unit (SMU). The system may include a functional unit and output terminals coupled to the functional unit. An excitation signal may be applied to a capacitor by the SMU. The capacitor may be included in a calibration circuit. The method may include obtaining one or more of a current calibration coefficient (CCC) or a voltage calibration coefficient (VCC). The CCC may correspond to a current-range setting and the VCC may correspond to a voltage-range setting. The CCC may be obtained from a value of a first current and a value of a second current developed in the capacitor responsive to the excitation signal. The VCC may be obtained from a value of a first voltage and a value of a second voltage developed across the capacitor responsive to the excitation signal.Type: GrantFiled: December 13, 2013Date of Patent: January 8, 2019Assignee: NATIONAL INSTRUMENTS CORPORATIONInventors: Christopher G. Regier, Pablo Limon
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Patent number: 9910074Abstract: An improved measurement system may include a source measure unit (SMU) capable of performing accurate low-level current measurements. Based on an SMU design that provides a controlled DC voltage source with precision current limiting and a controlled 0V (zero Volt) DC at the measurement terminal, an AC design may be implemented to establish the same (or very similar) conditions over a specified frequency range. Instead of controlling each digital-to-analog converter (DAC) at respective source terminals of the SMU as a respective DC output, each DAC may be controlled as a respective function generator with programmable frequency and continuously variable phase and amplitude. Off-the-shelf pipelined analog-to-digital converters (ADCs) may be used to monitor voltage, current and the voltage at the measurement terminal, and a Fourier transform may be used to obtain both the amplitude and relative phase measurements to be provided to respective control loops.Type: GrantFiled: November 12, 2015Date of Patent: March 6, 2018Assignee: NATIONAL INSTRUMENTS CORPORATIONInventors: Blake A. Lindell, Christopher G. Regier, Pablo Limon
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Publication number: 20170139001Abstract: An improved measurement system may include a source measure unit (SMU) capable of performing accurate low-level current measurements. Based on an SMU design that provides a controlled DC voltage source with precision current limiting and a controlled 0V (zero Volt) DC at the measurement terminal, an AC design may be implemented to establish the same (or very similar) conditions over a specified frequency range. Instead of controlling each digital-to-analog converter (DAC) at respective source terminals of the SMU as a respective DC output, each DAC may be controlled as a respective function generator with programmable frequency and continuously variable phase and amplitude. Off-the-shelf pipelined analog-to-digital converters (ADCs) may be used to monitor voltage, current and the voltage at the measurement terminal, and a Fourier transform may be used to obtain both the amplitude and relative phase measurements to be provided to respective control loops.Type: ApplicationFiled: November 12, 2015Publication date: May 18, 2017Inventors: Blake A. Lindell, Christopher G. Regier, Pablo Limon
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Patent number: 9651585Abstract: System and methods for use and fabrication of a printed circuit board (PCB). The PCB may include a node and a plurality of rows of vias that may be configured to establish a plurality of current pathways away from the node. The node may be a sensitive node and the plurality of current pathways may reduce leakage current at the node responsive to a signal applied to the node. Each row of the plurality of rows of vias may be offset with respect to adjacent rows of vias in a horizontal plane of the PCB. The PCB may have multiple layers and the node may be on an exterior surface layer or an interior layer. The vias may be mirco-vias, buried-vias, or through-vias.Type: GrantFiled: December 18, 2013Date of Patent: May 16, 2017Assignee: NATIONAL INSTRUMENTS CORPORATIONInventors: John G. Banaska, Pablo Limon
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Publication number: 20150168529Abstract: Systems and methods for calibration and operation of a source-measure unit (SMU). The system may include a functional unit and output terminals coupled to the functional unit. An excitation signal may be applied to a capacitor by the SMU. The capacitor may be included in a calibration circuit. The method may include obtaining one or more of a current calibration coefficient (CCC) or a voltage calibration coefficient (VCC). The CCC may correspond to a current-range setting and the VCC may correspond to a voltage-range setting. The CCC may be obtained from a value of a first current and a value of a second current developed in the capacitor responsive to the excitation signal. The VCC may be obtained from a value of a first voltage and a value of a second voltage developed across the capacitor responsive to the excitation signal.Type: ApplicationFiled: December 13, 2013Publication date: June 18, 2015Applicant: NATIONAL INSTRUMENTS CORPORATIONInventors: Christopher G. Regier, Pablo Limon
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Publication number: 20150168463Abstract: System and methods for use and fabrication of a printed circuit board (PCB). The PCB may include a node and a plurality of rows of vias that may be configured to establish a plurality of current pathways away from the node. The node may be a sensitive node and the plurality of current pathways may reduce leakage current at the node responsive to a signal applied to the node. Each row of the plurality of rows of vias may be offset with respect to adjacent rows of vias in a horizontal plane of the PCB. The PCB may have multiple layers and the node may be on an exterior surface layer or an interior layer. The vias may be mirco-vias, buried-vias, or through-vias.Type: ApplicationFiled: December 18, 2013Publication date: June 18, 2015Applicant: NATIONAL INSTRUMENTS CORPORATIONInventors: John G. Banaska, Pablo Limon