Patents by Inventor Pablo Rodriguez

Pablo Rodriguez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6833609
    Abstract: Integrated circuit device packages and substrates for making the packages are disclosed. One embodiment of a substrate includes a planar sheet of polyimide having a first surface, an opposite second surface, and apertures between the first and second surfaces. A planar metal die pad and planar metal are attached to the second surface of the polyimide sheet. The apertures in the polyimide sheet are juxtaposed to the leads. A package made using the substrate includes an integrated circuit device mounted above the first surface of the polyimide sheet opposite the die pad. Bond wires are connected between the integrated circuit device and the leads through the apertures in the polyimide sheet. An encapsulant material covers the first surface of the polyimide sheet, the integrated circuit device, the bond wires, and the apertures. The die pad and leads are exposed at an exterior surface of the package.
    Type: Grant
    Filed: January 30, 2003
    Date of Patent: December 21, 2004
    Assignee: Amkor Technology, Inc.
    Inventors: James M. Fusaro, Robert F. Darveaux, Pablo Rodriguez
  • Patent number: 6580159
    Abstract: Integrated circuit device packages and substrates for making the packages are disclosed. One embodiment of a substrate includes a planar sheet of polyimide having a first surface, an opposite second surface, and apertures between the first and second surfaces. A planar metal die pad and planar metal are attached to the second surface of the polyimide sheet. The apertures in the polyimide sheet are juxtaposed to the leads. A package made using the substrate includes an integrated circuit device mounted above the first surface of the polyimide sheet opposite the die pad. Bond wires are connected between the integrated circuit device and the leads through the apertures in the polyimide sheet. An encapsulant material covers the first surface of the polyimide sheet, the integrated circuit device, the bond wires, and the apertures. The die pad and leads are exposed at an exterior surface of the package.
    Type: Grant
    Filed: November 5, 1999
    Date of Patent: June 17, 2003
    Assignee: Amkor Technology, Inc.
    Inventors: James M. Fusaro, Robert F. Darveaux, Pablo Rodriguez
  • Patent number: 6343919
    Abstract: A melt distribution block for feeding melt through an extrusion die to an extrusion passage. The melt distribution block has a generally annular body with inner, outer, front and rear faces. The front and rear faces include a series of flow divider channels therein extending generally radially inwardly from an inlet and terminating in a plurality of feed spirals. The feed spirals curve radially inwardly from the flow divider channels to encircle the inner face and narrow toward a radially inwardly disposed end. The feed spirals on the front and rear spaces curve in respectively opposite directions. An inlet port extends into the outer face and fluidly communicates with the inlet of the flow divider channels. A melt distribution die includes an axially stacked array of melt distribution blocks interspersed with separator blocks extending radially about a centrally disposed mandrel to define an extrusion and passage therebetween.
    Type: Grant
    Filed: February 28, 2000
    Date of Patent: February 5, 2002
    Inventors: Ricardo Pablo Rodriguez, Michael Peter Bucko
  • Patent number: 6331451
    Abstract: Methods of making integrated circuit device packages and substrates for making the packages are disclosed. An embodiment of a method of making a substrate includes providing an unpatterned sheet of polyimide material having a first surface and an opposite second surface. A planar metal layer is attached to the second surface of the polyimide sheet. The metal layer is patterned to form an array of package sites, with each site including a planar die pad and planar leads. Apertures are formed through the polyimide sheet, either before or after attaching the metal layer. Each aperture is juxtaposed with a lead allowing access thereto. A method of making a package using the substrate includes mounting an integrated circuit device above the die pad (e.g., on the substrate or on the die pad through an aperture in the substrate). Bond wires are connected between the integrated circuit device and the leads through the apertures.
    Type: Grant
    Filed: November 5, 1999
    Date of Patent: December 18, 2001
    Assignee: Amkor Technology, Inc.
    Inventors: James M. Fusaro, Robert F. Darveaux, Pablo Rodriguez
  • Patent number: 6154369
    Abstract: An electronic assembly (20) having an insulated metal heat sink (10) and a method of manufacturing the electronic assembly (20). The electronic assembly (20) has a heat dissipater (11), a dielectric material (12), and a conductive layer (13). A semiconductor chip (21) is attached to the insulated metal heat sink (10). Heat generated by the semiconductor chip (21) is conducted to the conduction surface (14) of the heat dissipater (11). In one embodiment a convection surface (16) of the heat dissipater (11) is present and the heat is transferred from the convection surface (16) of the heat dissipater (11) to a fluid by convection. The fluid is directed by a manifold (64).
    Type: Grant
    Filed: December 7, 1999
    Date of Patent: November 28, 2000
    Assignee: Motorola, Inc.
    Inventors: Joe Luis Martinez, Jr., Pablo Rodriguez, Martin Aaron Kalfus
  • Patent number: 6147410
    Abstract: An electronic component includes a semiconductor substrate (101, 301, 401), an electrically conductive layer (102, 103, 302, 303, 402, 403) supported by the semiconductor substrate (101, 301, 401), and a lead (110, 120, 210, 310, 410, 420) having an electrical coupling portion (112, 122, 212, 312, 412, 422) coupled to and supported by the electrically conductive layer (102, 103, 302, 303, 402, 403) wherein the electrical coupling portion (112, 122, 212, 312, 412, 422) has at least one notch (115, 215, 315) adjacent to the electrically conductive layer (102, 103, 302, 303, 402, 403).
    Type: Grant
    Filed: March 2, 1998
    Date of Patent: November 14, 2000
    Assignee: Motorola, Inc.
    Inventors: Alexander J. Elliott, Timothy E. Meko, Gary R. Lorenzen, Kent Lamar Kime, Prosanto K. Mukerji, Keith W. Bailey, William L. Fragale, Pablo Rodriguez, George C. Chen