Abstract: The invention relates to a data processing system which comprises a memory module and a microprocessor. The memory modules comprise at least one low-speed memory and one high-speed memory; both store an interrupt vector table individually for recording the entry instruction of interrupt service routines. The microprocessor comprises a central processing unit (CPU) and a memory controller with a re-addressing device. Once an interruption occurs, the CPU generates and sends an interrupt vector address to the memory controller. If the vector is located in the range of interrupt vector table, the re-addressing device sends an enable signal to the high-speed memory to enable the CPU to fetch the entry instruction of interrupt service routines from the high-speed memory, not from the pre-determined low-speed memory. Hence, the interrupt latency is reduced.

Abstract: The invention relates to a data processing system which comprises a memory module and a microprocessor. The memory modules comprise at least one low-speed memory and one high-speed memory; both store an interrupt vector table individually for recording the entry instruction of interrupt service routines. The microprocessor comprises a central processing unit (CPU) and a memory controller with a re-addressing device. Once an interruption occurs, the CPU generates and sends an interrupt vector address to the memory controller. If the vector is located in the range of interrupt vector table, the re-addressing device sends an enable signal to the high-speed memory to enable the CPU to fetch the entry instruction of interrupt service routines from the high-speed memory, not from the pre-determined low-speed memory. Hence, the interrupt latency is reduced.

Abstract: The present invention is a data processing system, which comprises a microprocessor. The microprocessor comprises a central processing unit (CPU) and a built-in non-volatile program memory for storing a startup program. The system further comprises a volatile memory, a permanent memory for storing an application program permanently, a bus connected to the microprocessor, the volatile memory and the permanent memory, and a power supply for providing power to the data processing system. While the switch of the power supply is turned on, the startup program stored in the non-volatile program memory is initialized first to transmit the application program stored in the permanent memory to the volatile memory via the bus, so that the CPU only needs to call and execute the application program in the volatile memory, instead of the permanent memory, and doesn't need to read the permanent memory repeatedly to avoid reducing the system efficiency.