Patents by Inventor Paddy O'Shea

Paddy O'Shea has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7525183
    Abstract: A surface mountable multi-chip device is provided which includes first and second lead frames portions and at least two chips. The lead frame portions each include a header region and a lead region. Beneficially, the header regions of the first and second lead frame portions lie in a common plane, with at least one semiconductor chip being placed on each of the header regions. A conductive member link is placed on top of the two chips to electrically and mechanically interconnect the chips.
    Type: Grant
    Filed: July 10, 2007
    Date of Patent: April 28, 2009
    Assignee: General Semiconductor, Inc.
    Inventors: Paddy O'Shea, Eamonn Medley, Finbarr O'Donoghue, Gary Horsman
  • Publication number: 20080017959
    Abstract: A surface mountable multi-chip device is provided which includes first and second lead frames portions and at least two chips. The lead frame portions each include a header region and a lead region. Beneficially, the header regions of the first and second lead frame portions lie in a common plane, with at least one semiconductor chip being placed on each of the header regions. A conductive member link is placed on top of the two chips to electrically and mechanically interconnect the chips.
    Type: Application
    Filed: July 10, 2007
    Publication date: January 24, 2008
    Inventors: Paddy O'Shea, Eamonn Medley, Finbarr O'Donoghue, Gary Horsman
  • Patent number: 7242078
    Abstract: A surface mountable multi-chip device is provided which includes first and second lead frames portions and at least two chips. The lead frame portions each include a header region and a lead region. Beneficially, the header regions of the first and second lead frame portions lie in a common plane, with at least one semiconductor chip being placed on each of the header regions. A conductive member link is placed on top of the two chips to electrically and mechanically interconnect the chips.
    Type: Grant
    Filed: July 18, 2005
    Date of Patent: July 10, 2007
    Assignee: General Semiconductor, Inc.
    Inventors: Paddy O'Shea, Eamonn Medley, Finbarr O'Donoghue, Gary Horsman
  • Publication number: 20050248007
    Abstract: A surface mountable multi-chip device is provided which includes first and second lead frames portions and at least two chips. The lead frame portions each include a header region and a lead region. Beneficially, the header regions of the first and second lead frame portions lie in a common plane, with at least one semiconductor chip being placed on each of the header regions. A conductive member link is placed on top of the two chips to electrically and mechanically interconnect the chips.
    Type: Application
    Filed: July 18, 2005
    Publication date: November 10, 2005
    Inventors: Paddy O'Shea, Eamonn Medley, Finbarr O'Donoghue, Gary Horsman
  • Patent number: 6919625
    Abstract: A surface mountable multi-chip device is provided which includes first and second lead frames portions and at least two chips. The lead frame portions each include a header region and a lead region. Beneficially, the header regions of the first and second lead frame portions lie in a common plane, with at least one semiconductor chip being placed on each of the header regions. A conductive member link is placed on top of the two chips to electrically and mechanically interconnect the chips.
    Type: Grant
    Filed: July 10, 2003
    Date of Patent: July 19, 2005
    Assignee: General Semiconductor, Inc.
    Inventors: Paddy O'Shea, Eamonn Medley, Finbarr O'Donoghue, Gary Horsman
  • Publication number: 20050006731
    Abstract: A surface mountable multi-chip device is provided which includes first and second lead frames portions and at least two chips. The lead frame portions each include a header region and a lead region. Beneficially, the header regions of the first and second lead frame portions lie in a common plane, with at least one semiconductor chip being placed on each of the header regions. A conductive member link is placed on top of the two chips to electrically and mechanically interconnect the chips.
    Type: Application
    Filed: July 10, 2003
    Publication date: January 13, 2005
    Inventors: Paddy O'Shea, Eamonn Medley, Finbarr O'Donoghue, Gary Horsman
  • Patent number: 6197618
    Abstract: A temporary self-adherence of the individual components in a stack of semiconductor components is accomplished by the use of adhesive bodies either separate from the solder preforms used in the stack or included within the solder in the form of a tacky paste. The adhesive bodies may comprise relatively high-purity water, and adhesion of the adjoining parts is achieved by the surface tension of the water. During a single heating step, preferably performed in a protective, non-oxidizing atmosphere, the water is completely evaporated while the solder preforms are heated to form the desired solder joints.
    Type: Grant
    Filed: May 4, 2000
    Date of Patent: March 6, 2001
    Assignee: General Semiconductor Ireland
    Inventors: Marie Guillot, Paddy O'Shea