Patents by Inventor Padman Parayanthal

Padman Parayanthal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7084044
    Abstract: The present invention provides an optoelectronic device and a method of manufacture thereof. In one embodiment, the method of manufacturing the optoelectronic device may include creating a multilayered optical substrate and then forming a self aligned dual mask over the multilayered optical substrate. The method may further include etching the multilayered optical substrate through the self aligned dual mask to form a mesa structure.
    Type: Grant
    Filed: June 7, 2004
    Date of Patent: August 1, 2006
    Assignee: TriQuint Technology Holding Co.
    Inventors: Charles W. Lentz, Bettina A. Nechay, Abdallah Ougazzaden, Padman Parayanthal, George J. Przybylek
  • Patent number: 6828592
    Abstract: The present invention provides an optoelectronic device and a method of manufacture thereof. In one embodiment, the method of manufacturing the optoelectronic device may include creating a multilayered optical substrate and then forming a self aligned dual mask over the multilayered optical substrate. The method may further include etching the multilayered optical substrate through the self aligned dual mask to form a mesa structure.
    Type: Grant
    Filed: April 11, 2002
    Date of Patent: December 7, 2004
    Assignee: TriQuint Technology Holding Co.
    Inventors: Charles W. Lentz, Bettina A. Nechay, Abdallah Ougazzaden, Padman Parayanthal, George J. Przybylek
  • Publication number: 20040217475
    Abstract: A novel contact structure and method for a multilayer gettering contact metallization is provided utilizing a thin layer of a pure metal as the initial layer formed on a semiconductor cap layer. During formation of the contact structure, this thin metal layer reacts with the cap layer and the resulting reacted layer traps mobile impurities and self-interstitials diffusing within the cap layer and in nearby metal layers, preventing further migration into active areas of the semiconductor device. The contact metallization is formed of pure metal layers compatible with each other and with the underlying semiconductor cap layer such that depth of reaction is minimized and controllable by the thickness of the metal layers applied. Thin semiconductor cap layers, such as InGaAs cap layers less than 200 nm thick, may be used in the present invention with extremely thin pure metal layers of thickness 10 nm or less, thus enabling an increased level of integration for semiconductor optoelectronic devices.
    Type: Application
    Filed: May 27, 2004
    Publication date: November 4, 2004
    Inventors: Gustav E. Derkits, William R. Heffner, Padman Parayanthal, Patrick J. Carroll, Ranjani C. Muthiah
  • Publication number: 20040217365
    Abstract: The present invention provides an optoelectronic device and a method of manufacture thereof. In one embodiment, the method of manufacturing the optoelectronic device may include creating a multilayered optical substrate and then forming a self aligned dual mask over the multilayered optical substrate. The method may further include etching the multilayered optical substrate through the self aligned dual mask to form a mesa structure.
    Type: Application
    Filed: June 7, 2004
    Publication date: November 4, 2004
    Applicant: Agere Systems Inc.
    Inventors: Charles W. Lentz, Bettina A. Nechay, Abdallah Ougazzaden, Padman Parayanthal, George J. Przybylek
  • Publication number: 20030194827
    Abstract: The present invention provides an optoelectronic device and a method of manufacture thereof. In one embodiment, the method of manufacturing the optoelectronic device may include creating a multilayered optical substrate and then forming a self aligned dual mask over the multilayered optical substrate. The method may further include etching the multilayered optical substrate through the self aligned dual mask to form a mesa structure.
    Type: Application
    Filed: April 11, 2002
    Publication date: October 16, 2003
    Applicant: Agere Systems Inc.
    Inventors: Charles W. Lentz, Bettina A. Nechay, Abdallah Ougazzaden, Padman Parayanthal, George J. Przybylek
  • Publication number: 20030141599
    Abstract: A novel contact structure and method for a multilayer gettering contact metallization is provided utilizing a thin layer of a pure metal as the initial layer formed on a semiconductor cap layer. During formation of the contact structure, this thin metal layer reacts with the cap layer and the resulting reacted layer traps mobile impurities and self-interstitials diffusing within the cap layer and in nearby metal layers, preventing further migration into active areas of the semiconductor device. The contact metallization is formed of pure metal layers compatible with each other and with the underlying semiconductor cap layer such that depth of reaction is minimized and controllable by the thickness of the metal layers applied. Thin semiconductor cap layers, such as InGaAs cap layers less than 200 nm thick, may be used in the present invention with extremely thin pure metal layers of thickness 10 nm or less, thus enabling an increased level of integration for semiconductor optoelectronic devices.
    Type: Application
    Filed: February 4, 2003
    Publication date: July 31, 2003
    Inventors: Gustav E. Derkits, William R. Heffner, Padman Parayanthal, Patrick J. Carroll, Ranjani C. Muthiah
  • Patent number: 6555457
    Abstract: A novel contact structure and method for a multilayer gettering contact metallization is provided utilizing a thin layer of a pure metal as the initial layer formed on a semiconductor cap layer. During formation of the contact structure, this thin metal layer reacts with the cap layer and the resulting reacted layer traps mobile impurities and self-interstitials diffusing within the cap layer and in nearby metal layers, preventing further migration into active areas of the semiconductor device. The contact metallization is formed of pure metal layers compatible with each other and with the underlying semiconductor cap layer such that depth of reaction is minimized and controllable by the thickness of the metal layers applied. Thin semiconductor cap layers, such as InGaAs cap layers less than 200 nm thick, may be used in the present invention with extremely thin pure metal layers of thickness 10 nm or less, thus enabling an increased level of integration for semiconductor optoelectronic devices.
    Type: Grant
    Filed: April 7, 2000
    Date of Patent: April 29, 2003
    Assignee: Triquint Technology Holding Co.
    Inventors: Gustav E. Derkits, Jr., William R. Heffner, Padman Parayanthal, Patrick J. Carroll, Ranjani C. Muthiah
  • Patent number: 6542533
    Abstract: An electro-absorption modulated laser is provided having three sections, a laser section, an isolation section, and a modulation section. The laser section produces light along a straight waveguide path. The modulation section also has a straight waveguide path, but is angled with respect to the laser section's path. The isolation section between the other two sections includes a path that is collinear with the respective laser or modulation section at each end, but is gradually curved in the middle.
    Type: Grant
    Filed: April 10, 2000
    Date of Patent: April 1, 2003
    Assignee: TriQuint Technology Holding Co
    Inventor: Padman Parayanthal
  • Publication number: 20030026576
    Abstract: A method for reducing optical loss in opto-electronic devices includes passivating P-type dopant impurities formed within various cladding and contact layer films. The passivating species is atomic hydrogen produced by a hydrogen containing plasma. The atomic hydrogen complexes with P-type dopant impurities to form electrically neutral pairs which are void of free carriers. Absorption, and loss, of the optical wave is therefore suppressed as it propagates through the P-doped layers because of the reduced free carrier concentration in the P-doped layers.
    Type: Application
    Filed: August 6, 2001
    Publication date: February 6, 2003
    Inventors: Waleed A. Asous, Aaron Eugene Bond, Robert Louis Hartman, Padman Parayanthal, George John Przybylek, Gleb E. Shtengel
  • Patent number: 6483615
    Abstract: Optical sources, such as electro-absorption modulator isolated laser modules (EMILMs), for fiber optical communication systems are selected based on noise measures made outside—and preferably substantially outside—of the communication system's operational bandwidth. In one embodiment, EMILM devices are selected for communication systems having path lengths of 640 km or more based on both the chirp of the devices and the relative intensity noise (RIN) of the devices at the relaxation oscillation frequency Fr. Devices having both low chirp and low RIN at Fr are more likely to meet bit error rate requirements than are devices selected solely for low chirp.
    Type: Grant
    Filed: September 17, 1998
    Date of Patent: November 19, 2002
    Assignee: Agere Systems Inc.
    Inventors: Waleed A. Asous, Robert L. Hartman, Padman Parayanthal
  • Patent number: 6057954
    Abstract: An optoelectronic device, such as an electro-absorption modulator laser (EML), is configured to a submount using an asymmetric inductive peaking scheme in which a first wire connects a modulator signal electrode on the submount to the modulator contact pad on the device and a second wire connects the modulator contact pad to an integrated resistor on the submount, where the first and second wires have substantially different inductances. Such asymmetric inductive peaking improves the high-frequency performance of the resulting packaged device by providing a higher transmission coefficient and a lower return loss at high frequencies than devices configured using conventional symmetric inductive peaking in which the inductances of the two connecting wires are purposely designed to be equal. In one embodiment, in which the device will be modulated by a standard 50-ohm electrical signal generator, the integrated resistor is a 50-ohm device, the first wire is kept as short as practicable (e.g., about 0.
    Type: Grant
    Filed: September 18, 1998
    Date of Patent: May 2, 2000
    Assignee: Lucent Technologies Inc.
    Inventors: Padman Parayanthal, Gleb E. Shtengel