Patents by Inventor Padmanabham Patki

Padmanabham Patki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240020255
    Abstract: In various examples, methods may include receiving first data transmitted from a second component and second data transmitted from the second component during a first time period. The first data may be transmitted via a first data lane and the second data may be transmitted via a second data lane. The method may include receiving de-skew symbols at an interval from the second component via the first data lane and via the second data lane during the first time period. The method may include compensating for a first skew introduced to a first propagation of the first data across the first data lane and a second skew introduced to a second propagation of the second data across the second data lane using the de-skew symbols received during the first time period.
    Type: Application
    Filed: July 15, 2022
    Publication date: January 18, 2024
    Inventors: Padmanabham Patki, Nisha Bhushan, Kiran Kumar Dash, Arpit Gupta, Chung-Hong Lai, Michael Alan Ditty
  • Publication number: 20230273873
    Abstract: In various examples, a diagnostic circuit is connected to a target system to automatically trigger the target system to enter a diagnostic mode. The diagnostic circuit receives diagnostic data from the target system when the target system performs a diagnostic operation in the diagnostic mode.
    Type: Application
    Filed: February 28, 2022
    Publication date: August 31, 2023
    Inventors: Padmanabham Patki, Jue Wu, Chung-Hong Lai, Laurent Dahan, Marc Delvaux, Chiang Hsu
  • Patent number: 10671763
    Abstract: Computing devices are now used for various purposes ranging from monitoring a refrigerator to driving automobiles. Protecting the data and logic within the chips of the computing devices is essential to ensure reliable operation. When a particular partition of a chip is powered-up but the logic of the partition is not reset, the logic will be in an unpredictable random state. To operate in a secure environment, it is necessary to start the operation of the logic from a known state and not a random state. To ensure the logic is operating in a secure environment, a digital reset detector circuit (DRDC) is provided that indicates if the logic was reset after power-up. The DRDC can ensure chips are secure from attacks involving reset deprivation upon power-up and help protect various secure and secret assets in a chip, including customer keys.
    Type: Grant
    Filed: December 10, 2018
    Date of Patent: June 2, 2020
    Assignee: Nvidia Corporation
    Inventor: Padmanabham Patki
  • Publication number: 20200143090
    Abstract: Computing devices are now used for various purposes ranging from monitoring a refrigerator to driving automobiles. Protecting the data and logic within the chips of the computing devices is essential to ensure reliable operation. When a particular partition of a chip is powered-up but the logic of the partition is not reset, the logic will be in an unpredictable random state. To operate in a secure environment, it is necessary to start the operation of the logic from a known state and not a random state. To ensure the logic is operating in a secure environment, a digital reset detector circuit (DRDC) is provided that indicates if the logic was reset after power-up. The DRDC can ensure chips are secure from attacks involving reset deprivation upon power-up and help protect various secure and secret assets in a chip, including customer keys.
    Type: Application
    Filed: December 10, 2018
    Publication date: May 7, 2020
    Inventor: Padmanabham Patki