Patents by Inventor Padraig Cunningham

Padraig Cunningham has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7281001
    Abstract: A system (1) generates an output indicating scores for the extent of matching of pairs of data records. Thresholds may be set for the scores for decision-making or human review. A vector extraction module (12) measures similarity of pairs of fields in a pair of records to generate a vector. The vector is then processed to generate a score for the record pair.
    Type: Grant
    Filed: February 2, 2004
    Date of Patent: October 9, 2007
    Assignee: Informatica Corporation
    Inventors: Brian Caulfield, Garry Moroney, Padraig Cunningham, Ronan Pearce, Gary Ramsay, Sarah-Jane Delany
  • Publication number: 20040158562
    Abstract: A system (1) generates an output indicating scores for the extent of matching of pairs of data records. Thresholds may be set for the scores for decision-making or human review. A vector extraction module (12) measures similarity of pairs of fields in a pair of records to generate a vector. The vector is then processed to generate a score for the record pair.
    Type: Application
    Filed: February 2, 2004
    Publication date: August 12, 2004
    Inventors: Brian Caulfield, Garry Moroney, Padraig Cunningham, Ronan Pearce, Gary Ramsay, Sarah-Jane Delany
  • Patent number: 5555199
    Abstract: This invention refers to an automatic design process comprising the steps of:- (1)writing a target specification of an item to be designed to a partitioned section of a memory circuit; (2)automatically determining an address for a case stored in a case-base by reference to the target specification;(3)retrieving the case from the case-base and writing the retrieved case to a partitioned section of the memory circuit; and (4)adapting the retrieved case into conformity with the target specification, and writing the adapted case to a partitioned section of the memory circuit as a target solution. Preferably, the process further comprises successive cycles of retrieving a case and adapting the retrieved case, each cycle being initiated by writing of a target specification representing a component of the item to the target specification section of the memory circuit.
    Type: Grant
    Filed: July 29, 1993
    Date of Patent: September 10, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Padraig Cunningham, Barry Smyth