Patents by Inventor Pai-Wei Wang

Pai-Wei Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10817635
    Abstract: Disclosed is a method of fabricating an integrated circuit (IC) using a multiple (N>2) patterning technique. The method provides a layout of the IC having a set of IC features. The method further includes deriving a graph from the layout, the graph having vertices connected by edges, the vertices representing the IC features, and the edges representing spacing between the IC features. The method further includes selecting vertices, wherein the selected vertices are not directly connected by an edge, and share at least one neighboring vertex that is connected by N edges. The method further includes using a computerized IC tool to merge the selected vertices, thereby reducing a number of edges connecting the neighboring vertex to be below N. The method further includes removing a portion of the vertices that are connected by less than N edges.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: October 27, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ken-Hsien Hsieh, Chih-Ming Lai, Ru-Gun Liu, Wen-Chun Huang, Wen-Li Cheng, Pai-Wei Wang
  • Patent number: 10274829
    Abstract: A multiple patterning decomposition method for IC is provided. Features of layout of IC are decomposed into a plurality of nodes. The nodes are classified to assign a plurality of first and second links between the nodes. First and second pseudo colors are assigned to a pair of nodes of each first link. The second links having a pair of nodes both corresponding to the first or second pseudo color are identified. The nodes of the first links are uncolored. A first real color is assigned to the two uncolored nodes of the identified second links in each of the networks. A second real color is assigned to the uncolored nodes connected to the nodes corresponding to the first real color through the first links. First and second masks are formed according to the nodes corresponding to the first and second real colors, respectively.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: April 30, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ken-Hsien Hsieh, Wen-Li Cheng, Pai-Wei Wang, Ru-Gun Liu, Chih-Ming Lai
  • Publication number: 20190042685
    Abstract: Disclosed is a method of fabricating an integrated circuit (IC) using a multiple (N>2) patterning technique. The method provides a layout of the IC having a set of IC features. The method further includes deriving a graph from the layout, the graph having vertices connected by edges, the vertices representing the IC features, and the edges representing spacing between the IC features. The method further includes selecting vertices, wherein the selected vertices are not directly connected by an edge, and share at least one neighboring vertex that is connected by N edges. The method further includes using a computerized IC tool to merge the selected vertices, thereby reducing a number of edges connecting the neighboring vertex to be below N. The method further includes removing a portion of the vertices that are connected by less than N edges.
    Type: Application
    Filed: September 17, 2018
    Publication date: February 7, 2019
    Inventors: Ken-Hsien Hsieh, Chih-Ming Lai, Ru-Gun Liu, Wen-Chun Huang, Wen-Li Cheng, Pai-Wei Wang
  • Publication number: 20180164695
    Abstract: A multiple patterning decomposition method for IC is provided. Features of layout of IC are decomposed into a plurality of nodes. The nodes are classified to assign a plurality of first and second links between the nodes. First and second pseudo colors are assigned to a pair of nodes of each first link. The second links having a pair of nodes both corresponding to the first or second pseudo color are identified. The nodes of the first links are uncolored. A first real color is assigned to the two uncolored nodes of the identified second links in each of the networks. A second real color is assigned to the uncolored nodes connected to the nodes corresponding to the first real color through the first links. First and second masks are formed according to the nodes corresponding to the first and second real colors, respectively.
    Type: Application
    Filed: August 29, 2017
    Publication date: June 14, 2018
    Inventors: Ken-Hsien HSIEH, Wen-Li CHENG, Pai-Wei WANG, Ru-Gun LIU, Chih-Ming LAI
  • Patent number: 9231831
    Abstract: A method of converting a routing mode of a network is provided, wherein a plurality of first routes connected a central controller to a plurality of nodes are established in the network through a spanning tree protocol and a plurality of second routes between the nodes in the network through the spanning tree protocol. The method includes enabling a firewall of each of the nodes to block the second routes; disabling a spanning tree protocol function of each of the nodes; populating a forwarding table of each of the nodes with a plurality of predetermined routing paths; and flushing the firewall of each of the nodes, wherein a plurality of third routes between the central controller and the plurality of nodes are established according to the predetermined routing paths without the spanning tree protocol, after the firewall of each of the nodes is flushed.
    Type: Grant
    Filed: November 15, 2012
    Date of Patent: January 5, 2016
    Assignee: Industrial Technology Research Institute
    Inventors: Tzi-Cker Chiueh, Cheng-Chun Tu, Pai-Wei Wang
  • Publication number: 20140133360
    Abstract: A method of converting a routing mode of a network is provided, wherein a plurality of first routes connected a central controller to a plurality of nodes are established in the network through a spanning tree protocol and a plurality of second routes between the nodes in the network through the spanning tree protocol. The method includes enabling a firewall of each of the nodes to block the second routes; disabling a spanning tree protocol function of each of the nodes; populating a forwarding table of each of the nodes with a plurality of predetermined routing paths; and flushing the firewall of each of the nodes, wherein a plurality of third routes between the central controller and the plurality of nodes are established according to the predetermined routing paths without the spanning tree protocol, after the firewall of each of the nodes is flushed.
    Type: Application
    Filed: November 15, 2012
    Publication date: May 15, 2014
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Tzi-Cker Chiueh, Cheng-Chun Tu, Pai-Wei Wang