Abstract: A method involving the non-destructive testing of a sample electrical or electronic device is provided. The method includes measuring a power spectrum of the device and performing a Principal Component Analysis on the power spectrum, thereby to obtain a set of principal components of the power spectrum. The method further includes selecting a subset consisting of some of the principal components, and comparing the subset to stored reference data that include representations in terms of principal components of one or more reference populations of devices. Based at least partly on the comparison, the sample device is classified relative to the reference populations.

Abstract: A visualization method for screening electronic devices is provided. In accordance with the disclosed method, a probe is applied to a grid of multiple points on the circuit, and an output produced by the circuit in response to the stimulus waveform is monitored for each of multiple grid points where the probe is applied. A power spectrum analysis (PSA) produces a power spectrum amplitude, in each of one or more frequency bins, on the monitored output for each of the multiple grid points. The PSA provides a respective pixel value for each of the multiple grid points. An image is displayed, in which image portions representing the multiple grid points are displayed with the respective pixel values.

Abstract: A device sample is screened for defects using its power spectrum in response to a dynamic stimulus. The device sample receives a time-varying electrical signal. The power spectrum of the device sample is measured at one of the pins of the device sample. A defect in the device sample can be identified based on results of comparing the power spectrum with one or more power spectra of the device that have a known defect status.

Abstract: A passive voltage contrast (PVC) system and method are disclosed for analyzing ICs to locate defects and failure mechanisms. During analysis a device side of a semiconductor die containing the IC is maintained in an electrically-floating condition without any ground electrical connection while a charged particle beam is scanned over the device side. Secondary particle emission from the device side of the IC is detected to form an image of device features, including electrical vias connected to transistor gates or to other structures in the IC. A difference in image contrast allows the defects or failure mechanisms be pinpointed. Varying the scan rate can, in some instances, produce an image reversal to facilitate precisely locating the defects or failure mechanisms in the IC. The system and method are useful for failure analysis of ICs formed on substrates (e.g. bulk semiconductor substrates and SOI substrates) and other types of structures.

Abstract: An apparatus and method are presented for identifying and mapping functional failures in an integrated circuit (IC) due to timing errors therein based on the generation of functional failures in the IC. This is done by providing a set of input test vectors to the IC and adjusting one or more: of the IC voltage, temperature or clock frequency; the rate at which the test vectors are provided to the IC; or the power level of a focused laser beam used to probe the IC and produce localized heating which changes the incidence of the functional failures in the IC which can be sensed for locating the IC circuit elements responsible for the functional failures. The present invention has applications for optimizing the design and fabrication of ICs, for failure analysis, and for qualification or validation testing of ICs.

Abstract: A method and apparatus mechanism for testing data processing devices are implemented. The test mechanism isolates critical paths by correlating a scanning microscope image with a selected speed path failure. A trigger signal having a preselected value is generated at the start of each pattern vector. The sweep of the scanning microscope is controlled by a computer, which also receives and processes the image signals returned from the microscope. The value of the trigger signal is correlated with a set of pattern lines being driven on the DUT. The trigger is either asserted or negated depending the detection of a pattern line failure and the particular line that failed. In response to the detection of the particular speed path failure being characterized, and the trigger signal, the control computer overlays a mask on the image of the device under test (DUT).

Abstract: A scanning fluorescent microthermal imaging (FMI) apparatus and method is disclosed, useful for integrated circuit (IC) failure analysis, that uses a scanned and focused beam from a laser to excite a thin fluorescent film disposed over the surface of the IC. By collecting fluorescent radiation from the film, and performing point-by-point data collection with a single-point photodetector, a thermal map of the IC is formed to measure any localized heating associated with defects in the IC.