Abstract: A method and circuitry for suppressing additive transient disturbances in an analog differential input signal, such disturbances being due, for example, to thermal asperity transients caused by an MR transducer contacting a moving storage surface. The input data signal is algebraically summed with a corrective feedback signal for providing as output signal. The output signal is fed back to a circuit including an envelope detector and differentiator and converted into another signal that is the derivative of an amplitude envelope corresponding to the output signal. Nonlinear signal-adaptive filter means converts said other signal into the corrective feedback signal, which substantially replicates the additive transient disturbance and is subtracted from the data input signal to render the output signal substantially free of the transient disturbance.The input, output and corrective signals are preferably differential signals.

Abstract: A digital-to-analog converter for use in a timing control loop. The converter includes a plurality of cells, each activated in response to a timing loop control signal. The converter also includes a resistive current mirror, with a first resistance R1, providing a reference curent which is mirrored in each cell by a current source FET. Each cell is constructed to switch the current from its current source FET through an output FET when a respective control bit provided to the cell is positive. Otherwise, the current is diverted through a sink FET. All of the cell output FETs are tied to a single resistance R2 which collects the currents of the active cells and provides the AC output of the converter. The converter's output is related only to the ratio R2/R1, thereby decoupling process, temperature, and voltage effects from the output of the converter.

Abstract: A method and means for setting the free-running frequency of a voltage controlled oscillator (VCO) without requiring laser trimming or the like is described. The VCO forms part of an interconnected phase-locked loop (PLL) and frequency-locked loop (FLL). At system power on, the PLL is automatically disabled and a digital-to-analog (DAC) in the PLL is set to a value corresponding substantially to the center of a preselected lock range. The FLL, which includes a second DAC, then operates to generate a bias voltage for incrementing or decrementing the VCO output frequency until the VCO pulse count stored in a register equals an expected count; whereupon the VCO will be set at its free-running frequency. When the PLL is enabled, a phase error generator generates a digital phase error signal from the input data. A digital integrator converts the phase error signal to a digital frequency error signal.

Abstract: A voltage controlled oscillator (VCO) having high temperature stability and wide voltage/frequency linearity is provided. The VCO comprises a multivibrator being switched by a bipolar type device, and temperature fluctuations of the bipolar type means are compensated by a FET current source coupled thereto. To provide a linear relationship of frequency vs. voltage over wide voltage range, the bipolar device is further regulated by a plurality of resistor and diode networks.