Abstract: A level shifter circuit for translating input signal to output signal is disclosed. The level shifter includes an input stage and a latch stage. The latch stage comprises at least a transistor characterized in a substantially matched transconductance with the input stage for preventing a discrete realization of a voltage clamp circuit. The transistor is a semiconductor device including a source region having a source doping region and a drain region having a first doping region and a second doping region. The first doping region is doped with a first conductivity impurity. The second doping region is disposed around the first doping region so as to surround the first doping region, and is doped with a second conductivity impurity. The second doping region has a higher on-resistance than the first doping region, thereby a high resistive series path is created by the second doping region to mimic an embedded resistor.

Abstract: A passive matrix LED display driving scheme based on subframe pulse width modulation (PWM) to increase frame scan rate and further with channel-to-channel compensation is provided. The scheme may comprise: dividing each frame of the display video into T number of subframes; converting a driving signal for a pixel into a N-bit driving data, compensating the driving data with a compensation value; mapping the compensated driving data into the T number of subframes respectively.

Abstract: In a liquid crystal display (LCD), a liquid crystal (LC) panel has a display area of arbitrary shape. A light-emitting area of a backlight panel is partitioned into zones for providing local dimming to the LC panel. The LC panel is partitioned into display regions. An apparatus for controlling the LC panel and the backlight panel has zone registers each recording a proportion of area of a zone covered by a corresponding display region. The apparatus computes a dimming factor for the zone according to its recorded proportion and pixel data of a portion of image located on the zone, allowing local dimming to be provided without requiring boundary information of the display area. A two-phase arrangement is used to calculate the dimming factor, achieving local dimming to save power in backlight generation while reducing a potential loss of image brightness in high-brightness part of the image portion.

Abstract: A passive matrix LED display driving scheme based on subframe pulse width modulation (PWM) to increase frame scan rate and further with channel-to-channel compensation is provided. The scheme may comprise: dividing each frame of the display video into T number of subframes; converting a driving signal for a pixel into a N-bit driving data, compensating the driving data with a compensation value; mapping the compensated driving data into the T number of subframes respectively.

Abstract: An apparatus includes a sense element that generates a sense signal based on an output signal generated by a regulator. The apparatus also includes a current control unit that generates a compensated reference signal using the sense signal. The compensated reference signal is associated with an average of the output signal. The apparatus further includes a comparator that compares the compensated reference signal and the sense signal. In addition, the apparatus includes a hysteretic control unit that adjusts a control signal based on an output of the comparator and that provides the control signal to the regulator in order to adjust the output signal generated by the regulator. The hysteretic control unit could dynamically adjust peak and valley currents through an inductor in the regulator to maintain the average of the output signal at a substantially constant value.

Abstract: A circuit (10) for generating a voltage ramp signal (V.sub.RAMP) having minimum amplitude variation over a large frequency range has been provided. The circuit includes a comparator (40) for comparing a voltage across a ramp capacitor (32) with a reference voltage. From the result of this comparison, a sampling capacitor (16) is discharged during the time that the voltage ramp signal is less than the reference voltage and charged during the time that the voltage ramp signal is greater than the reference voltage. The resulting voltage across the sampling capacitor is held and fed back to a transconductance amplifier (20) which adjusts the current that charges the ramp capacitor thereby adjusting the peak amplitude of the voltage ramp signal.