Abstract: A differential line driver having integrated output termination resistors is disclosed. The termination resistors are a combination of a controlled transistor and a low precision resistor. The transistor calibrates-out the imprecision of the resistor based on a precise electrical reference. In a preferred embodiment the transistor is a CMOS transistor and the resistor is a CMOS resistor. The combination of a CMOS transistor and CMOS resistor features higher linearity and precision than a CMOS transistor alone due to the smaller effective drain-source voltage across the CMOS transistor. Moreover, the present invention discloses independent programmability of the integrated output termination resistor, the output common mode voltage, and the output amplitude. The value of the output termination resistor(s), the value of the output common mode voltage, and the value of the output amplitude are controlled independently and are continuously maintained with respect to a precise electrical reference.

Abstract: In a sense amp/latch, the reset/sense phase of the sense amp/latch is separated into two separately controllable operations. By separating the reset/sense phase into two separately controllable operations, the parameters associated with optimization (speed and/or completeness of reset vs. larger gain during sensing) are substantially independent of each other and therefore do not conflict with each other. The separation of the reset/sense phase into two separately controllable operations is accomplished by setting a load impedance of the sense amp/latch to a first level during a reset phase, to a second level during a sensing phase, and to a third level during a latching phase.

Abstract: A method and apparatus for adjusting the output common-mode of a differential amplifier is disclosed. This is accomplished by reducing the supply voltage to the differential amplifier during the auto-zero mode and returning the supply voltage to the original level during the amplification mode.

Abstract: A reconfigurable analog-to-digital (A/D) converter that produces an N bit output in a first operating mode and an (N+1) bit output in a second operating mode. The reconfigurable A/D converter is especially well-suited for use in a read channel device.

Abstract: An integrated circuit controls the low level, electromechanical functionality of a computer mass storage device, such as a magnetic disk drive incorporating a spindle motor for rotatably controlling a disk and an actuator for positioning at least one read/write head with respect to the disk, to read or write encoded data configured in information data sectors and to sense encoded data of servo data sectors. A servo subsystem is coupled to an output of the read/write head for detecting the servo data sectors and providing a control signal in response thereto. An analog-to-digital subsystem is also coupled to an output of the read/write head and is operative in response to the servo subsystem control signal for converting the encoded data of the servo data sectors to digital transducer position information representative of a position of the read/write head with respect to the data tracks.