Abstract: Methods and systems are described for selectively providing a signal path from a respective wire of a multi-wire bus to at least one corresponding data signal output node of at least one set of differential data signal output nodes using a respective switching element in a respective set of signal path circuits connected in parallel, and generating a set of discharge currents, each discharge current of the set of discharge currents generated through a respective resistive element in the respective set of signal path circuits to discharge a portion of a voltage pulse on the respective wire of the multi-wire bus to one or more metallic planes via a respective localized ESD protection circuit, the respective resistive element and the respective localized ESD protection circuit connected between the respective wire and the respective switching element.

Abstract: A circuit includes an oscillator circuit to receive a bias current and generate an oscillating signal at an output node. A current differencing circuit subtracts a current at the output node from a reference current to generate a first current. In addition, a current mirroring circuit mirrors the first current to generate the bias current. An inverter stage is coupled to the output node, and includes an input branch configured to receive the oscillating signal and generate first and second control signals based upon the oscillating signal. At least one amplifying branch receives the first and second control signals and amplifies the first and second control signals. An output branch receives the amplified first and second control signals and generates an amplified version of the oscillating signal based upon the amplified first and second control signals.

Abstract: A circuit includes an oscillator circuit to receive a bias current and generate an oscillating signal at an output node. A current differencing circuit subtracts a current at the output node from a reference current to generate a first current. In addition, a current mirroring circuit mirrors the first current to generate the bias current. An inverter stage is coupled to the output node, and includes an input branch configured to receive the oscillating signal and generate first and second control signals based upon the oscillating signal. At least one amplifying branch receives the first and second control signals and amplifies the first and second control signals. An output branch receives the amplified first and second control signals and generates an amplified version of the oscillating signal based upon the amplified first and second control signals.