Patents by Inventor Pamir Erdeniz

Pamir Erdeniz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7926719
    Abstract: An electronic circuit (12, 12?) for a reader device (10, 10?) for contactless communication with a transponder (20) is disclosed. The electronic circuit (12, 12?) comprises a connection (13a, 13b) to an antenna (11) of said reader device (10, 10?), which antenna (11) is designed for receiving a radio signal (TRS) from said transponder (20). Furthermore, it comprises a receiving module (14), which is connected to the antenna connection (13a, 13b) and arranged for processing an input voltage (VI) from said antenna (11) representing said radio signal (TRS). To provide satisfactory operation of the receiving module (14) and to compensate a bad matching of the antenna circuit to the electronic circuit (12, 12?) and/or bad environmental conditions where the reader device (10, 10?) is operated, the electronic circuit furthermore comprises a control module (15, 15?).
    Type: Grant
    Filed: October 16, 2006
    Date of Patent: April 19, 2011
    Assignee: NXP B.V.
    Inventors: Bernhard Spiess, Pamir Erdeniz, Michael Zenz
  • Publication number: 20080223931
    Abstract: An electronic circuit (12, 12?) for a reader device (10, 10?) for contactless communication with a transponder (20) is disclosed. The electronic circuit (12, 12?) comprises a connection (13a, 13b) to an antenna (11) of said reader device (10, 10?), which antenna (11) is designed for receiving a radio signal (TRS) from said transponder (20). Furthermore, it comprises a receiving module (14), which is connected to the antenna connection (13a, 13b) and arranged for processing an input voltage (VI) from said antenna (11) representing said radio signal (TRS). To provide satisfactory operation of the receiving module (14) and to compensate a bad matching of the antenna circuit to the electronic circuit (12, 12?) and/or bad environmental conditions where the reader device (10, 10?) is operated, the electronic circuit furthermore comprises a control module (15, 15?).
    Type: Application
    Filed: October 16, 2006
    Publication date: September 18, 2008
    Applicant: NXP B.V.
    Inventors: Bernhard Spiess, Pamir Erdeniz, Michael Zenz
  • Patent number: 7272729
    Abstract: In a data carrier (1) and in an integrated circuit (5), a first signal processing circuit (8) with a signal-independent power supply is provided for processing a signal stream (SF1) in accordance with a first transmission protocol, and a second signal processing circuit (9) with a signal-dependent power supply is provided for processing a signal stream (SF2) in accordance with a second transmission protocol, which signal stream (SF2) in accordance with the second transmission protocol comprises a signal characteristic, namely a lead signal (VLS), and a detection circuit (25) is provided, which detection circuit is designed for detecting the lead signal (VLS) and ensuring the supplying of the second signal processing circuit (9) with power from a power source (14) provided for the second signal processing circuit (9) following a recognition of the occurrence of the lead signal (VLS).
    Type: Grant
    Filed: July 31, 2002
    Date of Patent: September 18, 2007
    Assignee: NXP B.V.
    Inventors: Bernhard Georg Spiess, Werner Janesch, Pamir Erdeniz
  • Publication number: 20040257733
    Abstract: In a data carrier (1) and in an integrated circuit (5), a first signal processing circuit (8) with a signal-independent power supply is provided for processing a signal stream (SF1) in accordance with a first transmission protocol, and a second signal processing circuit (9) with a signal-dependent power supply is provided for processing a signal stream (SF2) in accordance with a second transmission protocol, which signal stream (SF2) in accordance with the second transmission protocol comprises a signal characteristic, namely a lead signal (VLS), and a detection circuit (25) is provided, which detection circuit is designed for detecting the lead signal (VLS) and ensuring the supplying of the second signal processing circuit (9) with power from a power source (14) provided for the second signal processing circuit (9) following a recognition of the occurrence of the lead signal (VLS).
    Type: Application
    Filed: February 6, 2004
    Publication date: December 23, 2004
    Inventors: Bernhard Georg Spiess, Werner Janesch, Pamir Erdeniz
  • Patent number: 6750770
    Abstract: A transponder (1) and an integrated circuit (4) have at least one signal channel (5, 6, 7), each signal channel (5, 6, 7) having at least two signal processing stages (25, 26, 27, 28, 29, 30, 31) and at least one signal processing stage (26, 27, 29) configured such as to be activatable and deactivatable, while an associated bypass branch (32, 33, 34), which is also activatable and deactivatable, is provided for each activatable and deactivatable signal processing stage (26, 27, 29), and a microcomputer (36) and a control register (37) controllable by the microcomputer, (36) are provided, by means of which each activatable and deactivatable signal processing stage (26, 27, 29) and the associated bypass branch (32, 33, 34) are activatable and deactivatable in counterphase.
    Type: Grant
    Filed: October 1, 2002
    Date of Patent: June 15, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Bernhard Spiess, Werner Janesch, Pamir Erdeniz
  • Publication number: 20030067382
    Abstract: A transponder (1) and an integrated circuit (4) have at least one signal channel (5, 6, 7), each signal channel (5, 6, 7) having at least two signal processing stages (25, 26, 27, 28, 29, 30, 31) and at least one signal processing stage (26, 27, 29) configured such as to be activatable and deactivatable, while an associated bypass branch (32, 33, 34), which is also activatable and deactivatable, is provided for each activatable and deactivatable signal processing stage (26, 27, 29), and a microcomputer (36) and a control register (37) controllable by the microcomputer (36) are provided, by means of which each activatable and deactivatable signal processing stage (26, 27, 29) and the associated bypass branch (32, 33, 34) are activatable and deactivatable in counterphase.
    Type: Application
    Filed: October 1, 2002
    Publication date: April 10, 2003
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Bernhard Spiess, Werner Janesch, Pamir Erdeniz