Abstract: An apparatus for demodulating an analogue input signal comprises a hard limiter stage (4) for converting the signal to a two level signal. A digital down converter/low pass filter stage (6) converts the signal to a base band signal, and a symbol synchronization stage (8) extracts symbol timing. An instantaneous phase detector (10) calculates the instantaneous phase of the one or more symbols associated with the input signal. If the input signal has been modulated according to a pi/4DQPSK, pi/2DBPSK, GMSK, or a GFSK modulation scheme, a differential detector (12) determines a difference in the phase between adjacent symbols, a coarse frequency offset compensation stage (14) applies a compensation signal to compensate for frequency offset, and a frequency offset estimation stage (16) updates this compensation signal. A demapper (18) generates a demodulated output signal after compensation by the frequency offset compensation stage.

Abstract: An apparatus for demodulating an analogue input signal comprises a hard limiter stage (4) for converting the signal to a two level signal, A digital down converter/low pass filter stage (6) converts the signal to a base band signal, and a symbol synchronization stage (8) extracts symbol timing. An instantaneous phase detector (10) calculates the instantaneous phase of the one or more symbols associated with the input signal. If the input signal has been modulated according to a pi/4DQPSK, pi/2DBPSK, GMSK, or a GFSK modulation scheme, a differential detector (12) determines a difference in the phase between adjacent symbols, a coarse frequency offset compensation stage (14) applies a compensation signal to compensate for frequency offset, and a frequency offset estimation stage (16) updates this compensation signal. A demapper (18) generates a demodulated output signal after compensation by the frequency offset compensation stage.