Patents by Inventor Pan Ki Kwon

Pan Ki Kwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6864177
    Abstract: A method for manufacturing of a metal line contact plug of a semiconductor device by performing a two step CMP process using (1) a first slurry solution having high etching selectivity of metal/insulating film and (2) a second slurry solution having small etching selectivity of metal/insulating film, thereby minimizing dependency on CMP devices and separating easily a metal line contact plug.
    Type: Grant
    Filed: December 26, 2002
    Date of Patent: March 8, 2005
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jong Goo Jung, Ki Cheol Ahn, Pan Ki Kwon
  • Publication number: 20040014321
    Abstract: A method for manufacturing a contact plug of a semiconductor device is disclosed. A CMP process is performed on an interlayer insulating film and a polysilicon layer using a disclosed acidic CMP slurry containing an oxidizer, thereby minimizing dishing phenomenon of the interlayer insulating film and the polysilicon layer. Accordingly, the degradation of characteristics of a device can be prevented, which results in improvement of characteristics and reliability of a semiconductor device to manufacture a highly integrated semiconductor device.
    Type: Application
    Filed: June 30, 2003
    Publication date: January 22, 2004
    Inventors: Pan Ki Kwon, Sang Ick Lee
  • Publication number: 20030166338
    Abstract: A chemical mechanical polishing (hereinafter, referred to as ‘CMP’) slurry for metal is disclosed, more specifically, method for manufacturing metal line contact plug of semiconductor device using an acidic CMP slurry for oxide film further comprising an oxidizer and a complexing agent, which polishes a metal, an oxide film and a nitride film at a similar speed, thereby easily separates a metal line contact plug.
    Type: Application
    Filed: December 30, 2002
    Publication date: September 4, 2003
    Inventors: Ki Cheol Ahn, Pan Ki Kwon, Jong Goo Jung, Sang Ick Lee
  • Publication number: 20030124861
    Abstract: A chemical mechanical polishing (CMP) slurry for applying onto a complex structure consisting of two or more among a metal film, a nitride film and an oxide film and a method for manufacturing a metal line contact plug of a semiconductor device using the slurry. During a CMP process to form a metal line contact plug, an acidic CMP slurry having similar polishing speeds of metal films, oxide films and nitride films and not containing an oxidizer is used. As a result, a metal line contact plug can be easily separated using an acidic CMP slurry without any oxidizer.
    Type: Application
    Filed: December 26, 2002
    Publication date: July 3, 2003
    Inventors: Pan Ki Kwon, Sang Ick Lee
  • Publication number: 20030119324
    Abstract: A method for manufacturing of a metal line contact plug of a semiconductor device by performing a two step CMP process using (1) a first slurry solution having high etching selectivity of metal/insulating film and (2) a second slurry solution having small etching selectivity of metal/insulating film, thereby minimizing dependency on CMP devices and separating easily a metal line contact plug.
    Type: Application
    Filed: December 26, 2002
    Publication date: June 26, 2003
    Inventors: Jong Goo Jung, Ki Cheol Ahn, Pan Ki Kwon
  • Publication number: 20030003712
    Abstract: The present invention discloses methods for fabricating a semiconductor device. A gate electrode having a hard mask layer at its upper portion is formed, and an interlayer insulating film is formed over the resultant structure. A landing plug contact hole is formed by etching the interlayer insulating film, and a conductive layer is formed over the resultant structure, filling up the landing plug contact hole. A first CMP process is performed to expose the hard mask layer, and a second CMP process is preformed to planarize the hard mask layer, the interlayer insulating film and the landing plug conductive layer. The CMP processes of the present invention reduce or prevent dishing of the mask insulating film or contact plug, to reduce or prevent the likelihood of a bridge forming between adjacent conductive plugs. As a result, the semiconductor device has improved properties and/or improved yield.
    Type: Application
    Filed: June 27, 2002
    Publication date: January 2, 2003
    Applicant: Hynix Semiconductor Inc.
    Inventors: Pan Ki Kwon, Sang Ick Lee, Chul Woo Nam