Patents by Inventor Pan-Kwi Park

Pan-Kwi Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8772173
    Abstract: A method of manufacturing a semiconductor device includes providing a substrate having a gate structure, a source region, and a drain region formed thereon, and the gate structure includes a gate insulating layer and a gate electrode. The method also includes forming a first stress layer on the substrate, removing the first stress layer, and forming a second stress layer on the substrate.
    Type: Grant
    Filed: May 1, 2012
    Date of Patent: July 8, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-kwan Yu, Dong-suk Shin, Pan-kwi Park, Ki-eun Kim
  • Publication number: 20140138745
    Abstract: Semiconductor devices including a stressor in a recess and methods of forming the semiconductor devices are provided. The methods may include forming a trench in an active region and the trench may include a notched portion of the active region. The methods may also include forming an embedded stressor in the trench. The embedded stressor may include a lower semiconductor layer and an upper semiconductor layer, which has a width narrower than a width of the lower semiconductor layer. A side of the upper semiconductor layer may not be aligned with a side of the lower semiconductor layer and an uppermost surface of the upper semiconductor layer may be higher than an uppermost surface of the active region.
    Type: Application
    Filed: September 23, 2013
    Publication date: May 22, 2014
    Inventors: Dong-Suk Shin, Hyun-Chul Kang, Dong-Hyun Roh, Pan-Kwi Park, Geo-Myung Shin, Nae-In Lee, Chul-Woong Lee, Hoi-Sung Chung, Young-Tak Kim
  • Publication number: 20130320434
    Abstract: In a semiconductor device, a first active region has a first ?-shape, and the second active region has a second ?-shape. When a line that is perpendicular to the substrate and passes a side surface of a first gate electrode in the first region is defined as a first vertical line, when a line that is perpendicular to the substrate and passes a side surface of a second gate electrode in the second region is defined as a second vertical line, when a shortest distance between the first vertical line and the first trench is defined as a first horizontal distance, and when a shortest distance between the second vertical line and the second trench is defined as a second horizontal distance, a difference between the first horizontal distance and the second horizontal distance is equal to or less than 1 nm.
    Type: Application
    Filed: June 3, 2013
    Publication date: December 5, 2013
    Inventors: Dong-Suk Shin, Myung-Sun Kim, Seong-Jin Nam, Pan-Kwi Park, Hoi-Sung Chung, Nae-In Lee
  • Patent number: 8502286
    Abstract: A semiconductor device includes a MOSFET, and a plurality of stress layers disposed on the MOSFET, wherein the stress layers include a first stress layer disposed on the MOSFET and a second stress layer disposed on the first stress layer, the first stress layer has a first stress and the second stress layer has a second stress, and the first stress is different from the second stress.
    Type: Grant
    Filed: July 22, 2010
    Date of Patent: August 6, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ha-Jin Lim, Dong-Suk Shin, Pan-Kwi Park
  • Publication number: 20120315760
    Abstract: A method of manufacturing a semiconductor device includes providing a substrate having a gate structure, a source region, and a drain region formed thereon, and the gate structure includes a gate insulating layer and a gate electrode. The method also includes forming a first stress layer on the substrate, removing the first stress layer, and forming a second stress layer on the substrate.
    Type: Application
    Filed: May 1, 2012
    Publication date: December 13, 2012
    Inventors: Hyun-kwan YU, Dong-suk SHIN, Pan-kwi PARK, Ki-eun KIM
  • Patent number: 8227308
    Abstract: A method of fabricating a semiconductor integrated circuit (IC) device can include forming a first silicide layer on at least a portion of a transistor on a substrate, forming nitrogen in the first silicide layer to form a second silicide layer, forming a first stress layer having a tensile stress on the substrate having the transistor formed thereon, and irradiating the first stress layer with ultraviolet (UV) light to form a second stress layer having greater tensile stress than the first stress layer.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: July 24, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ha-Jin Lim, Dong-Suk Shin, Pan-Kwi Park, Jun-Jung Kim, Tae-Gyun Kim
  • Patent number: 7977257
    Abstract: In a semiconductor device and a method of manufacturing a semiconductor device, a lower electrode is formed on a semiconductor substrate. A first zirconium oxide layer is formed on the lower electrode by performing a first deposition process using a first zirconium source and a first oxidizing gas. A zirconium carbo-oxynitride layer is formed on the first zirconium oxide layer by performing a second deposition process using a second zirconium source, a second oxidizing gas and a nitriding gas, and an upper electrode is formed on the zirconium carbo-oxynitride layer. A zirconium oxide-based composite layer having a high dielectric constant and a thin equivalent oxide thickness can be obtained.
    Type: Grant
    Filed: March 27, 2009
    Date of Patent: July 12, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Weon-Hong Kim, Min-Woo Song, Pan-Kwi Park, Jung-Min Park
  • Publication number: 20110018044
    Abstract: A semiconductor device includes a MOSFET, and a plurality of stress layers disposed on the MOSFET, wherein the stress layers include a first stress layer disposed on the MOSFET and a second stress layer disposed on the first stress layer, the first stress layer has a first stress and the second stress layer has a second stress, and the first stress is different from the second stress.
    Type: Application
    Filed: July 22, 2010
    Publication date: January 27, 2011
    Inventors: HA-JIN LIM, Pan-Kwi Park, Dong-Suk Shin
  • Publication number: 20100171182
    Abstract: A strained semiconductor device includes a first plurality of transistors spaced with a first gate pitch, a second plurality of transistors spaced with a second gate pitch greater than the first gate pitch, and an etch stop layer disposed on the first and second pluralities of transistors. The etch stop layer between each of the second plurality of transistors has a greater proportion of a stress-altering material than the etch stop layer between each of the first plurality of transistors.
    Type: Application
    Filed: January 5, 2010
    Publication date: July 8, 2010
    Inventors: Dong-Suk Shin, Pan-Kwi Park, Ha-Jin Lim, Joo-Chan Kim
  • Publication number: 20100167533
    Abstract: A method of fabricating a semiconductor integrated circuit (IC) device can include forming a first silicide layer on at least a portion of a transistor on a substrate, forming nitrogen in the first silicide layer to form a second silicide layer, forming a first stress layer having a tensile stress on the substrate having the transistor formed thereon, and irradiating the first stress layer with ultraviolet (UV) light to form a second stress layer having greater tensile stress than the first stress layer.
    Type: Application
    Filed: December 28, 2009
    Publication date: July 1, 2010
    Inventors: Ha-Jin Lim, Dong-Suk Shin, Pan-Kwi Park, Jun-Jung Kim, Tae-Gyun Kim
  • Patent number: 7704867
    Abstract: In semiconductor devices and methods of manufacturing semiconductor devices, a zirconium source having zirconium, carbon and nitrogen is provided onto a substrate to form an adsorption layer of the zirconium source on the substrate. A first purging process is performed to remove a non-adsorbed portion of the zirconium source. An oxidizing gas is provided onto the adsorption layer to form an oxidized adsorption layer of the zirconium source on the substrate. A second purging process is performed to remove a non-reacted portion of the oxidizing gas. A nitriding gas is provided on the oxidized adsorption layer to form a zirconium carbo-oxynitride layer on the substrate, and a third purging process is provided to remove a non-reacted portion of the nitriding gas.
    Type: Grant
    Filed: March 10, 2009
    Date of Patent: April 27, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Weon-Hong Kim, Min-Woo Song, Pan-Kwi Park, Jung-Min Park
  • Publication number: 20090246949
    Abstract: In a semiconductor device and a method of manufacturing a semiconductor device, a lower electrode is formed on a semiconductor substrate. A first zirconium oxide layer is formed on the lower electrode by performing a first deposition process using a first zirconium source and a first oxidizing gas. A zirconium carbo-oxynitride layer is formed on the first zirconium oxide layer by performing a second deposition process using a second zirconium source, a second oxidizing gas and a nitriding gas, and an upper electrode is formed on the zirconium carbo-oxynitride layer. A zirconium oxide-based composite layer having a high dielectric constant and a thin equivalent oxide thickness can be obtained.
    Type: Application
    Filed: March 27, 2009
    Publication date: October 1, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Weon-Hong Kim, Min-Woo Song, Pan-Kwi Park, Jung-Min Park
  • Publication number: 20090233434
    Abstract: In semiconductor devices and methods of manufacturing semiconductor devices, a zirconium source having zirconium, carbon and nitrogen is provided onto a substrate to form an adsorption layer of the zirconium source on the substrate. A first purging process is performed to remove a non-adsorbed portion of the zirconium source. An oxidizing gas is provided onto the adsorption layer to form an oxidized adsorption layer of the zirconium source on the substrate. A second purging process is performed to remove a non-reacted portion of the oxidizing gas. A nitriding gas is provided on the oxidized adsorption layer to form a zirconium carbo-oxynitride layer on the substrate, and a third purging process is provided to remove a non-reacted portion of the nitriding gas.
    Type: Application
    Filed: March 10, 2009
    Publication date: September 17, 2009
    Inventors: Weon-Hong KIM, Min-woo Song, Pan-Kwi Park, Jung-Min Park