Abstract: A display substrate and a display device. The display substrate includes: a base substrate; first and second sub-pixels in adjacent rows and the same column; a sensing transistor, including a third gate and a third active layer; and a scanning signal line including a main body portion extending in the first direction and protruding portions extending in the second direction. The protruding portions include first and second protruding portion, orthographic projection of the first and second protruding portion on the base substrate at least partially overlap third active layers of sensing transistors of the first and second sub-pixels, respectively, and the overlapping parts are third gates of the sensing transistors of the first and second sub-pixels, respectively. The third gates of the sensing transistor of the first and second sub-pixels are respectively on opposite sides of a main body portion of a same scanning signal line in the second direction.

Abstract: A display substrate includes an underlayer substrate and a circuit structure layer. The circuit structure layer is located in a display area of the underlayer substrate. The circuit structure layer includes at least one first circuit area and at least one second circuit area. The first circuit area includes at least one first gate drive circuit; the second circuit area includes at least one second gate drive circuit. The first gate drive circuit is cascaded with the second gate drive circuit. The first gate drive circuit includes a plurality of cascaded first gate drive units, and the second gate drive circuit includes a plurality of cascaded second gate drive units. A plurality of first gate drive units are sequentially arranged in a second direction, and a plurality of second gate drive units are sequentially arranged in the second direction.

Abstract: The display substrate includes a plurality of repeating units, which include at least one first power supply line, at least one compensation signal line, at least two data signal line groups and a plurality of sub-pixels, wherein the plurality of sub-pixels form at least two pixel rows and at least two pixel columns, the data signal line groups includes at least two data signal lines, and the sub-pixels include a storage capacitor; the first power supply line and the compensation signal line are arranged between two adjacent pixel columns in the repeating unit, and at least two data signal line groups are arranged on both sides, in the pixel row direction, of the repeating unit, respectively; and the storage capacitor is arranged between the data signal line and the first power supply line, or the storage capacitor is arranged between the data signal line and the compensation signal line.

Abstract: Present disclosure relates to a shift register unit, a display apparatus and a driving method. The shift register unit includes: a decode control sub-circuit configured to, according to signal of gating control terminal, connect a first gating clock terminal and a first node; a node control sub-circuit coupled to the first, second and third nodes, and configured to, according to signal of first gating clock terminal, a second gating clock terminal and the first node, control signal of the second and the third nodes; an output sub-circuit coupled to the second and third nodes and drive output terminals electrically connected to output clock signal terminals. The output sub-circuit is configured to, according to signal of the second node, provide signals of the output clock signal terminals to the drive output terminals, and according to signal of the third node, provide signal of reference signal terminal to the drive output terminals.

Abstract: A display substrate, including a base substrate, a plurality of pixel units, and a pixel definition layer. The pixel unit includes a first sub-pixel, a second sub-pixel, a third sub-pixel, and a fourth sub-pixel. The fourth sub-pixel is a white sub-pixel, and any two of the first sub-pixel, the second sub-pixel, the third sub-pixel and the fourth sub-pixel display different colors. In at least one pixel unit, at least one of the first sub-pixel, the second sub-pixel and the third sub-pixel is located in a different row from the fourth sub-pixel. In at least one pixel unit, each of orthographic projections of a first opening of the first sub-pixel, a second opening of the second sub-pixel and a third opening of the third sub-pixel on the base substrate has an area less than that of a fourth opening of the fourth sub-pixel on the base substrate.

Abstract: A display substrate includes: a substrate and a plurality of subpixels arranged on the substrate, the plurality of subpixels are arranged in an array; the subpixel includes a subpixel driving circuit and a light emitting element, and the subpixel driving circuit includes a driving sub-circuit and a light emitting control sub-circuit coupled to each other; the light emitting element includes an anode pattern; the plurality of subpixels are divided into a plurality of groups of subpixels, each group of subpixels includes two subpixels arranged along a first direction, and two subpixel driving circuits included in the two subpixels share a same light emitting control sub-circuit, the light emitting control sub-circuit is configured to respectively control the driving sub-circuits in the two subpixels to write a driving signal to the anode pattern; the subpixel further includes a data line including a part extending along the first direction.

Abstract: A display panel and a display apparatus. The display panel comprises a base substrate and a second source-drain metal layer. The base substrate has a display area and a non-display area; the non-display area comprises a plurality of sub-areas distributed in an array in both row and column directions; the sub-areas in a same column correspond to shift register units of various stages in a same gate driving circuit; and the sub-areas in a same row correspond to the shift register units of a same stage in the various gate driving circuits. The second source-drain metal layer comprises a plurality of output signal lines. The display panel and the display apparatus can save the occupied space of the gate driving circuits close to the display area in the column direction, thus facilitating the implementation of narrow bezels of display panels.

Abstract: A display substrate and a manufacturing method thereof, and a display device are provided. In the display substrate, at least one first transmission portion extends in a second direction, a plurality of connection via holes are provided in the insulating layer, and the at least one first transmission portion is electrically connected with at least one second transmission portion through at least one connection via hole, an orthographic projection of at least a portion of an edge of the at least one first transmission portion extending in the second direction on the base substrate falls into an orthographic projection of the connection via hole on the base substrate.

Abstract: At least one embodiments of the present disclosure provides a display substrate and a display device, the display substrate includes a base substrate, sub-pixels, and signal lines; the sub-pixels arranged in an array along a first direction and a second direction on the base substrate and include pixel circuits, each of the sub-pixels includes display units, each of the display units is independently driven by a corresponding pixel circuit, and adjacent display units form a pixel unit group; at least part of the signal line extends along the second direction, display units in at least one pixel unit group are connected to a same signal line, and in the second direction, the signal line includes a first connection portion and a second connection portion, and in the first direction, a width of the first connection portion is less than a width of the second connection portion.

Abstract: Provided are a display substrate, display panel and display device. The display substrate includes: pixel circuit units provided on a base substrate, including pixel circuit groups which includes pixel circuits and separation regions light emitting devices provided on the base substrate and electrically connected to the pixel circuits and data lines and constant signal lines provided on the base substrate. The pixel circuits and the separation regions are alternately arranged. The separation regions include first and second separation regions that are alternately arranged. The data lines are located in the first separation regions, two pixel circuits adjacent in a second direction share a same data line the constant signal lines are located in the second separation regions, different constant signal lines are located in different second separation regions and the pixel circuits in the pixel circuit unit share the constant signal lines.

Abstract: A display substrate and a display device are provided, the display substrate includes a base substrate and conductive pads in a bonding region, each conductive pad includes a first sub-pad, a first insulating layer, a second sub-pad, a second insulating layer, a first via, and a second via. The second sub-pad is directly connected with the first sub-pad through the first via in the first insulating layer; the second via penetrates the second insulating layer to expose a part of the second sub-pad. At least one first via is provided between the first sub-pad and a corresponding second sub-pad, an orthographic projection of the first via on the base substrate overlaps with an orthographic projection of at least one second via on the base substrate, and at least one second via has a size in the second direction being larger than a size in the first direction.

Abstract: A display panel includes a plurality of rows of pixel circuits, one or more rows of first dummy pixel circuits, a plurality of cascaded scanning driving units and at least one first dummy scanning driving unit. The plurality of rows of pixel circuits are arranged in a first direction. The one or more rows of first dummy pixel circuits are located on a side of the plurality of rows of pixel circuits in the first direction. Each scanning driving unit is configured to transmit a scanning signal to at least one row of pixel circuits. A first dummy scanning driving unit is cascaded to a first stage of scanning driving unit among the plurality of scanning driving units, and is configured to transmit; a cascade signal to the first stage of scanning driving unit; and transmit scanning signals to at least one row of first dummy pixel circuits.

Abstract: A display substrate includes: a base substrate; a plurality of pixel circuits on the base substrate; and a plurality of pixels; the pixel includes a first sub-pixel, a second sub-pixel and a third sub-pixel; orthographic projections of the first sub-pixel, the second sub-pixel and the third sub-pixel on the base substrate do not overlap with each other; the first sub-pixel, the second sub-pixel and the third sub-pixel are electrically connected to the pixel circuits in a one-to-one correspondence manner; a first distance in a first direction exists between the first sub-pixel and the second sub-pixel, and a first via is arranged in the first distance; a second distance in the first direction exists between the first sub-pixel and the third sub-pixel, and a first via is arranged in the second distance; a third distance in the first direction exists between the second sub-pixel and the third sub-pixel.

Abstract: A display substrate includes an underlayer substrate and a circuit structure layer. The circuit structure layer is located in a display area of the underlayer substrate. The circuit structure layer includes at least one first circuit area and at least one second circuit area. The first circuit area includes at least one first gate drive circuit; the second circuit area includes at least one second gate drive circuit. The first gate drive circuit is cascaded with the second gate drive circuit. The first gate drive circuit includes a plurality of cascaded first gate drive units, and the second gate drive circuit includes a plurality of cascaded second gate drive units. A plurality of first gate drive units are sequentially arranged in a second direction, and a plurality of second gate drive units are sequentially arranged in the second direction.

Abstract: The present disclosure provides a driving circuitry, a driving method, a display substrate and a display device. The driving circuitry includes a driving output circuitry, a first resetting circuitry and a first isolation circuitry. The driving output circuitry is configured to control a driving signal output end to be electrically coupled to a first voltage line or a first clock signal line under the control of a potential at a first node. The first resetting circuitry is configured to control a first clock signal line to write a first clock signal into a first control node under the control of a first resetting signal. The first isolation circuitry is configured to control the first control node to be electrically coupled to the first node under the control of a second clock signal.

Abstract: A display substrate and a display apparatus. Each pixel repeat unit (10) includes two pixel regions (P1, P2) arranged in a first direction, and a light transmission region (T) located between the two pixel regions (P1, P2), where each of the pixel regions (P1, P2) is provided with at least three sub-pixels (A, B, C) which are adjacently provided; and the area of the light transmission region (T) is equal to twice the area of a light transmission region (T) corresponding to a single pixel region (P1, P2).

Abstract: Disclosed are a display panel and a display apparatus. The display panel includes: a base substrate, an anode layer, a cathode layer, an organic functional layer and cathode signal lines, wherein the organic functional layer is located between the anode layer and the cathode layer, and the orthographic projection of the organic functional layer on the base substrate overlaps with the display area; the cathode signal lines are located on the side of the organic functional layer that is close to the base substrate, and the cathode signal lines are located in the non-display area; the organic functional layer includes a plurality of organic functional layer patterns disconnected with each other; and the cathode signal line is coupled to the cathode layer at a gap between two adjacent organic functional layer patterns.

Abstract: A driving signal generation circuit includes a first node generation circuit, a second node generation circuit, a third node generation circuit, a first control node control circuit, a second control node control circuit and an output circuit; the second control node control circuit is configured to control to connect the second control node and the first clock signal terminal under the control of the potential of the second control node, and control the potential of the second control node according to the potential of the second node; the output circuit is configured to output corresponding driving signal through the driving signal output terminal under the control of the potential of the first control node and the potential of the second control node.

Abstract: A display panel includes a plurality of sub-pixels, a sub-pixel includes a pixel driving circuit, and the pixel driving circuit includes at least a driving transistor and a storage capacitor. The display panel further includes a substrate, and a first gate conductive layer, a semiconductor layer and a second gate conductive layer that are disposed on the substrate. The first gate conductive layer includes a first electrode plate of the storage capacitor. The semiconductor layer includes an active layer pattern of the driving transistor. At least part of the active layer pattern of the driving transistor and at least part of the first electrode plate are disposed in a same layer. The second gate conductive layer includes a second electrode plate of the storage capacitor and a gate electrode of a driving transistor electrically connected to the second electrode plate.

Abstract: The present disclosure provides a display substrate and a display apparatus. The display substrate has a display region, and the display substrate includes a base substrate and a plurality of gate lines and a plurality of data lines on the base substrate; the plurality of gate lines and the plurality of data lines are arranged to cross each other to define a plurality of pixel regions, and a pixel unit is arranged in a pixel region of the plurality of pixel regions; each pixel unit includes a thin-film transistor and a light-emitting device in the display region; the display substrate further comprises a plurality of fan-out traces in the display region, wherein each fan-out trace of the plurality of fan-out traces is electrically connected to a data line corresponding to the fan-out trace, and is arranged in a different layer from the date lines and the gate lines.