Abstract: A pixel circuit, a driving method therefor, a display substrate and a display apparatus, the pixel circuit includes a node control sub-circuit, a storage sub-circuit, a driving sub-circuit and a light emitting control sub-circuit; the storage sub-circuit is electrically connected to a second node and a first power supply line respectively, and is configured to charge the second node when a first scanning signal line is an effective level signal.

Abstract: The present disclosure relates to a display panel with a display area, a first non-display area and a second non-display area are correspondingly disposed on opposite sides of the display area in a first direction, and a binding area is disposed on a side of the second non-display area away from the display area. The display panel includes: a first wire, disposed in the display area and extending along the first direction, wherein the first wire is electrically coupled to a plurality of pixels arranged along the first direction; a second wire, extending along the first direction and extending from the display area to the first non-display area, the second non-display area and the binding area; a connection wire, disposed in the first non-display area and coupled between the first wire and the second wire; and a binding pin, disposed in the binding area and coupled to the second wire.

Abstract: A displaying base board includes an active area and a peripheral region, the peripheral region includes at least a first blocking part and a second blocking part; the peripheral region further includes a first power-supply signal line, and an orthographic projection of the first power-supply signal line on a substrate of the displaying base board has an overlapping part with individually an orthographic projection of the first blocking part on the substrate and an orthographic projection of the second blocking part on the substrate; and the first power-supply signal line is provided with a plurality of openings, and a region enclosed by orthographic projections on the substrate of outer contours of some of the openings falls within a region of the orthographic projection on the substrate of at least one of the first blocking part and the second blocking part.

Abstract: A driving circuit, a driving method, a driving module and a display device are provided. The driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, an output circuit, a voltage control circuit and a third control node control circuit. The third control node control circuit is electrically connected to the first node and the third control node respectively, and is configured to control the potential of the third control node according to the potential of the first node.

Abstract: A display panel having a bonding region for bonding an integrated circuit is provided. The display panel includes a base substrate; and a plurality of bonding pin structures on the base substrate arranged in a plurality of columns, respectively. A respective bonding pin structure includes a respective bonding pin and connection lines on two ends of the respective bonding pin, respectively. Bonding pins of the plurality of bonding pin structures are arranged in N rows, N is a positive integer equal to or greater than 4. (N?1) number of connection lines pass through a region between two adjacent bonding pins arranged in a same row.

Abstract: Display substrate, method for manufacturing the same, and display device are disclosed. The display substrate comprises: a base substrate comprising a display region and a peripheral region located at a periphery of the display region, the display region comprises at least two display sub-regions; the display substrate further comprises scanning lines and sub-pixels, wherein the scanning lines comprise first scanning lines comprising at least two scanning line segments independent from each other, and the at least two scanning line segments are located in different display sub-regions; and the sub-pixels are divided into rows of sub-pixels, the rows of sub-pixels comprise a target row of sub-pixels which is divided into at least two sub-pixel groups located in different display sub-regions, and the scanning line segment is coupled to each sub-pixel in a corresponding sub-pixel group belonging to a same display sub-region.

Abstract: A display substrate, a manufacturing method thereof and a display apparatus are provided.

Abstract: A touch display panel and an electronic product. The touch display panel includes a display substrate, a first conductive layer, a touch insulation layer, a second electrode layer, and a shielding conductive pattern; the display substrate includes a signal line, a first electrode layer and a second electrode layer; the first conductive layer includes a touch conductive structure, which includes touch electrodes, the first electrode layer includes first electrodes, and the second electrode layer includes a plurality of second electrodes; an orthographic projection of the shielding conductive pattern on the base substrate overlaps with that of the signal line and that of at least one of the plurality of touch electrodes respectively, the shielding conductive pattern is located in the first conductive layer and insulated from the touch conductive structure, or the shielding conductive pattern is located in the second electrode layer and insulated from the second electrode.

Abstract: A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit and an output circuit; the driving signal generation circuit generates and outputs the Nth stage of driving signal; the gating circuit controls to write the gating input signal into the first node; the output control circuit performs a NAND operation on the Nth stage of driving signal and the potential of the second terminal of the output control circuit to obtain a first output signal; the output circuit inverts the first output signal to obtain and provide an output driving signal through the output driving terminal; N is a positive integer.

Abstract: A display substrate includes a base substrate (100), and multiple pixel circuits (11a, 11b) and multiple first auxiliary structures disposed on the base substrate (100). The multiple first auxiliary structures are located at edges of the multiple pixel circuits (11a, 11b). At least one first auxiliary structure is adjacent to at least one pixel circuit (11a, 11b). The multiple pixel circuits (11a, 11b) include at least one semiconductor layer located on the base substrate (100). An orthographic projection of the at least one first auxiliary structure on the base substrate (100) is at least partially identical to an orthographic projection of the semiconductor layer of the at least one pixel circuit (11a, 11b) on the base substrate (100).

Abstract: A display substrate and a display panel are provided. The display substrate has an opening region, a transition region surrounding the opening region, and a display region surrounding the transition region; the display substrate includes: a base plate, post spacers and dam structures on the base plate and in the transition region and surrounding the opening region; the post spacers include a first post spacer on a side of the dam structures proximal to the display region; an organic light emitting diode, a first encapsulation layer, a second encapsulation layer and a third encapsulation layer are sequentially arranged on the base plate, the organic light emitting diode is in the display region, and orthographic projections of the first encapsulation layer and the third encapsulation layer on the base plate at least cover the display region and the transition region.

Abstract: A touch display panel and an electronic product. The touch display panel includes a display substrate, a first conductive layer, a touch insulation layer, a second electrode layer, and a shielding conductive pattern; the display substrate includes a signal line, a first electrode layer and a second electrode layer; the first conductive layer includes a touch conductive structure, which includes touch electrodes, the first electrode layer includes first electrodes, and the second electrode layer includes a plurality of second electrodes; an orthographic projection of the shielding conductive pattern on the base substrate overlaps with that of the signal line and that of at least one of the plurality of touch electrodes respectively, the shielding conductive pattern is located in the first conductive layer and insulated from the touch conductive structure, or the shielding conductive pattern is located in the second electrode layer and insulated from the second electrode.

Abstract: A display panel and a display device are provided. The display panel includes sub pixel units arranged in an array along a first direction (X) and a second direction (Y) intersecting with the first direction (X). The display panel further includes a base substrate (81), a second conductive layer, a fourth conductive layer, and a common electrode layer (6). The second conductive layer includes multiple first conductive parts (21). The first conductive part (21) is arranged in correspondence with the pixel driving circuit. The first conductive part (21) is used to form the first electrode of the capacitor (C) in the pixel driving circuit corresponding thereto. The fourth conductive layer includes multiple first power lines (VSS). Orthographic projections of the first power lines (VSS) on the base substrate (81) are distributed in a spaced manner along the first direction (X) and extend along the second direction (Y).

Abstract: A polypeptide based on RIP3 methylation modification and application thereof in cell necroptosis-related diseases are provided, belonging to the technical field of biomedicine. The polypeptide for inhibiting intestinal inflammatory injury (TAT-mRIP3-SDMA) is formed by connecting cell-penetrating peptide TAT and methylated RIP3 polypeptide.

Abstract: The present disclosure relates to the field of display technologies, and in particular, to a display panel, a method for manufacturing the same and a display device. The display panel includes a first layer; a first adhesive layer on the first layer; an array substrate on the first adhesive layer; a second adhesive layer on the array substrate and including a same material as the first adhesive layer; and a second layer on the second adhesive layer and including a same material as the first layer.

Abstract: A unidirectional transient voltage suppression diode and a process, including a substrate of a first conductivity type and a first implantation region and a second implantation region of a second conductivity type, where the first implantation region is disposed on a front side of the substrate, and the second implantation region is disposed on a back side of the substrate. Depth of a pn junction formed between the second implantation region and the substrate is less than that between the first implantation region and the substrate. First metal is led out of the first implantation region as a first electrode, an insulation layer is disposed between a barrier layer and a first metal layer, and second metal is led out of the second implantation region on the back side and the substrate respectively as a second electrode.

Abstract: A driving circuit, a driving method, a pixel circuit, a display panel and a display device are provided. The driving circuit includes a first switching circuit and a scanning signal generation circuit; the first switching circuit is electrically connected to a first gating control line, at least two data output terminals of a source driver and the scanning signal generation circuit, and is configured to write a data signal provided by the at least two data output terminals into the scanning signal generation circuit under the control of a first gating control signal provided by the first gating control line; the scanning signal generation circuit is configured to generate a scanning signal according to the data signal, and output the scanning signal through the scanning signal output terminal.

Abstract: A display apparatus is provided. The display apparatus includes a display panel having a display portion, a connecting portion, and a bending portion; a main support layer; and an auxiliary support layer including a main portion and a folded-back portion connected to the main portion as a unitary structure. An edge portion of the display apparatus includes a stacked structure. The stacked structure includes the connecting portion; the folded-back portion on the connecting portion; at least a part of the main portion on a side of the folded-back portion away from the connecting portion; a part of the main support layer; and a part of the display portion on a side of the part of the main support layer away from the main portion. Layers of the stacked structure is curved toward a back side of the display apparatus.

Abstract: A display panel having a bonding region for bonding an integrated circuit is provided. The display panel includes a base substrate; and a plurality of bonding pin structures on the base substrate arranged in a plurality of columns, respectively. A respective bonding pin structure includes a respective bonding pin and connection lines on two ends of the respective bonding pin, respectively. Bonding pins of the plurality of bonding pin structures are arranged in N rows, N is a positive integer equal to or greater than 4. (N?1) number of connection lines pass through a region between two adjacent bonding pins arranged in a same row.

Abstract: An array substrate is provided. The array substrate includes a plurality of first reset signal lines configured to provide a plurality of first reset signals, a plurality of second reset signal lines configured to provide a plurality of second reset signals, a plurality of third reset signal lines, and a plurality of first connecting lines. A respective first reset signal line is connected to a row of first connecting lines, which in turn are connected to source electrodes of first reset transistors in a row of subpixels, respectively. The plurality of second reset signal lines and the plurality of third reset signal lines form an interconnected reset signal supply network. A respective second reset signal line is connected to one or more of the plurality of third reset signal lines. A respective third reset signal line is connected to one or more of the plurality of second reset signal lines.