Patents by Inventor Pan

Pan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8253194
    Abstract: A semiconductor structure comprises a drift region of a first conductivity type in a semiconductor region. A well region of a second conductivity type is over the drift region. A source region of the first conductivity type is in an upper portion of the well region. A heavy body region of the second conductivity type extends in the well region. The heavy body region has a higher doping concentration than the well region. A first diffusion barrier region at least partially surrounds the heavy body region. A gate electrode is insulated from the semiconductor region by a gate dielectric.
    Type: Grant
    Filed: September 17, 2008
    Date of Patent: August 28, 2012
    Assignee: Fairchild Semiconductor Corporation
    Inventor: James Pan
  • Patent number: 8252690
    Abstract: A method of forming a seed layer of an interconnect structure includes forming a dielectric layer; forming an opening in the dielectric layer; performing a first deposition step to form the seed layer; and in-situ performing a first etch step to remove a portion of the seed layer. The method may further includes additional deposition and etch steps for forming the seed layer.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: August 28, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Lin Su, Cheng-Lin Huang, Shing-Chyang Pan, Ching-Hua Hsieh
  • Patent number: 8255765
    Abstract: A low-density parity check (LDPC) decoder comprises a decoded data stream generator that generates a decoded data stream based on a received data stream and a set of matrix-based codewords. The matrix-based codewords form a LDPC parity check matrix H. A decoder control module at least one of prewrites or replaces a selected portion of at least one of the plurality of codewords with zeros prior to generation of the decoded data stream.
    Type: Grant
    Filed: July 11, 2007
    Date of Patent: August 28, 2012
    Assignee: Marvell International Ltd.
    Inventors: Engling Yeo, Eugene Pan, Henri Sutioso, Jun Xu, Shaohua Yang, Panu Chaichanavong, Gregory Burd, Zining Wu
  • Patent number: 8254849
    Abstract: An FM radio with a wide frequency range operates in a cell phone without interfering with the VCO of the RF transceiver. The FM transceiver generates a VCO signal whose frequency varies by less than ±7% from the midpoint of a narrow first range. A synthesizer signal is generated by dividing the VCO frequency by a first divisor such that the synthesizer frequency varies over a lower frequency second range. The VCO frequency is also divided by a second divisor such that the synthesizer frequency varies over a third range. The upper limit of the second range falls at the lower limit of the third range. The lower limit of the second range is 85.5 MHz and the upper limit of the third range is 108.0 MHz. By also using a third divisor, a synthesizer signal with a range of 76-108 MHz is generated from the narrow first frequency range.
    Type: Grant
    Filed: April 2, 2009
    Date of Patent: August 28, 2012
    Assignee: QUALCOMM Incorporated
    Inventors: Tzu-wang Pan, Yi Zeng, I-Hsiang Lin, Pushp K. Trikha, Jeremy D. Dunworth, Rahul Apte
  • Patent number: 8254563
    Abstract: This invention discloses a system for line powering in communications. The system for line powering includes a power supply at the central office and remote power supply units (PSUs) connected to the power supply, wherein the power supply at the central office comprises at least two central office PSUs, and the central office PSUs provide power for the remote PSUs after being connected in parallel. At least two central office PSUs are set and connected in parallel to provide power for the remote PSUs, which provides redundant power backup for the remote PSUs and ensures reliability of normal communications in the network communication system. This method also helps to reduce the number of PSUs at the central office power supply part, to save space of the equipment room and to facilitate monitoring of central office PSUs. Thereby, this solution achieves reliable communication services, high integration of central office equipment and cost-effective network communication system.
    Type: Grant
    Filed: March 24, 2006
    Date of Patent: August 28, 2012
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Xuefeng Pan, Zhen Qin, Tianli Jiang, Yingjie Zhou
  • Patent number: 8254314
    Abstract: Provided is a device and method for scheduling uplink resources in a wireless communication system supporting VoIP. When its data rate is decreased, an MS notifies a BS of the rate decreased. When increasing its data rate, the MS requests resource allocation to the BS by transmitting a BR header or a CQICH codeword. Compared to the conventional ertPS in which the BS periodically allocates uplink resources to the MS irrespective of the state of the MS, the BS does not allocate uplink resources when the MS transitions form a talk-spurt period to a silence period. Therefore, resources consumption arising from unnecessary bandwidth allocation is reduced.
    Type: Grant
    Filed: April 28, 2006
    Date of Patent: August 28, 2012
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Hyun-Jeong Kang, Jung-Won Kim, Jung-Je Son, Hyoung-Kyu Lim, Yeong-Moon Son, Sung-Jin Lee, Chang-Hoi Koo, Pan-Yuh Joo, Young-Ho Kim
  • Patent number: 8253776
    Abstract: An image rectification method for a video device includes receiving an image that is a facial image of a transmitter from the transmitter, obtaining a first angular deviation with respect to line of sight of the transmitter according to the image, obtaining a second horizontal angular deviation and a second vertical angular deviation with respect to line of sight of a receiver using the video device, and performing an image synthesis procedure on the image according to the first angular deviation, the second horizontal angular deviation and the second vertical angular deviation, for generating an eye-to-eye image sent to the receiver.
    Type: Grant
    Filed: December 29, 2008
    Date of Patent: August 28, 2012
    Assignee: ASUSTeK Computer Inc.
    Inventors: Liang-Gee Chen, Chia-Ho Pan
  • Patent number: 8251719
    Abstract: A flash drive includes a frame and a main body. A receiving portion defining a receiving space therein is formed on an end of the frame. Two arms extend from opposite ends of the receiving portion. A universal serial bus (USB) connector is formed on an end of the main body. The main body is slidably and pivotably installed between the arms. The main body is operable to slide toward the receiving portion to insert the USB connector into the receiving space. And when the USB connector is received in the receiving space, the main body is operable to slide away from the receiving portion, to move the USB connector out from the receiving space, and the main body is then pivotable relative to the arms.
    Type: Grant
    Filed: May 5, 2011
    Date of Patent: August 28, 2012
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Jian-Chun Pan, Hai-Qing Zhou, Yi-Xin Tu
  • Patent number: 8255759
    Abstract: Systems and methodologies are described that facilitate ensuring contention and/or collision free memory within a turbo decoder. A Posteriori Probability (APP) Random Access Memory (RAM) can be segmented or partitioned into two or more files with an interleaving sub-group within each file. This enables parallel operation in a turbo decoder and allows a turbo decoder to access multiple files simultaneously without memory access contention.
    Type: Grant
    Filed: October 29, 2009
    Date of Patent: August 28, 2012
    Assignee: QUALCOMM Incorporated
    Inventors: Hanfang Pan, Yongbin Wei
  • Patent number: 8255670
    Abstract: In one embodiment, a processor comprises a scheduler configured to issue a first instruction operation to be executed and an execution core coupled to the scheduler. Configured to execute the first instruction operation, the execution core comprises a plurality of replay sources configured to cause a replay of the first instruction operation responsive to detecting at least one of a plurality of replay cases. The scheduler is configured to inhibit issuance of the first instruction operation subsequent to the replay for a subset of the plurality of replay cases. The scheduler is coupled to receive an acknowledgement indication corresponding to each of the plurality of replay cases in the subset, and is configured to inhibit issuance of the first instruction operation until the acknowledgement indication is asserted that corresponds to an identified replay case of the subset.
    Type: Grant
    Filed: November 17, 2009
    Date of Patent: August 28, 2012
    Assignee: Apple Inc.
    Inventors: Po-Yung Chang, Wei-Han Lien, Jesse Pan, Ramesh Gunna, Tse-Yu Yeh, James B. Keller
  • Patent number: 8253271
    Abstract: A power supply system is disclosed. The system comprises an AC power source from a power grid and a DC power source from an alternative power generation system. The alternative power generation system may comprise one or a plurality of solar systems. The system may also comprise one or a plurality of wind turbines. The AC power generated by a generator of the turbine is converted into the DC power by a device comprising a rectifier. There are two groups of electrical appliances connected to the system. The first group receives the AC power only and the second group receives the AC and/or the DC power supplies. The power supply system provides a means of supplying the electrical appliances the DC power with the higher priority and therefore minimizes power consumption from the power grid.
    Type: Grant
    Filed: October 17, 2009
    Date of Patent: August 28, 2012
    Inventor: Yang Pan
  • Patent number: 8253274
    Abstract: A power supply system is disclosed. The system comprises an AC power source from a power grid and a DC power source from an alternative energy source. The alternative energy source is a solar system in the preferred embodiment. The system provides a means of supplying the electrical appliance the DC power from the solar system with the higher priority. According to one embodiment of the present invention, a switch controlled by a controller provides a means of switching the power supply in between the two power sources without disrupting the operation of the appliance. According to another embodiment, a voltage regulator combines power generated from both sources to supply the power for the appliance with consuming the DC power from the solar system as the priority source.
    Type: Grant
    Filed: October 10, 2009
    Date of Patent: August 28, 2012
    Inventor: Yang Pan
  • Patent number: 8253175
    Abstract: A sealed semiconductor device having reduced delamination of the sealing layer in high temperature, high humidity conditions is disclosed. The semiconductor device includes a substrate and a stack of device layers on the substrate sealed with a sealing layer. The upper surface of a street area of the substrate is oxidized so that the oxidized region extends under the sealing layer. The presence of the oxidized region of the upper surface of the substrate helps reduce the delamination, because the oxidized surface does not react with water to the same extent as a non-oxidized surface. The semiconductor devices remain sealed after dicing through the street area because the oxidized surface does not delaminate.
    Type: Grant
    Filed: January 18, 2010
    Date of Patent: August 28, 2012
    Inventors: Zhong Pan, Craig Ciesla
  • Patent number: 8255609
    Abstract: A switch apparatus includes first to third video graphics array (VGA) interfaces, first to sixth universal serial bus (USB) interfaces, a single-pole double-throw (SPDT) switch, and first to eighteenth electronic switches. The first VGA interface is connected to the second and third VGA interfaces through the electronic switches. The first USB interface is connected the second and third USB interfaces through the electronic switches. The fourth USB interface is connected to the fifth and sixth USB interfaces through the electronic switches. The SPDT switch is used to control the first VGA interface to be selectively connected to the second or third VGA interface, and control the first USB interface to be selectively connected to the second or third USB interface, and control the fourth USB interface to be selectively connected to the fifth or sixth USB interface.
    Type: Grant
    Filed: December 7, 2010
    Date of Patent: August 28, 2012
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Jian-Chun Pan, De-Jun Zeng, Chung-Chi Huang
  • Patent number: 8255764
    Abstract: A decoder system comprises a tensor-product code (TPC) decoder that decodes a received data stream to generate a decoded signal. A mark module that replaces low-density parity check (LDPC) parity bits of the decoded signal with 0s to generate a reset output signal. A deinterleave module deinterleaves error correction parity bits that are within the reset output signal to generate a deinterleaved signal that comprises a decoded portion and a concatenated portion. The concatenated portion comprises the error correction parity bits. A parity decoder module removes the concatenated portion from the deinterleaved signal.
    Type: Grant
    Filed: July 11, 2007
    Date of Patent: August 28, 2012
    Assignee: Marvell International Ltd.
    Inventors: Engling Yeo, Eugene Pan, Henri Sutioso, Jun Xu, Shaohua Yang, Panu Chaichanavong, Gregory Burd, Zining Wu
  • Patent number: 8255729
    Abstract: A time sequence control circuit is provided to control time sequence of a motherboard of a computer. A first voltage received by a power supply receiving terminal is greater than a preset voltage before a signal control terminal on the motherboard receives a second voltage during turning on the computer. During shutting off the computer, the first voltage at the power supply receiving terminal drops and is less than the preset voltage, and the second voltage supplied to the signal control terminal on the motherboard is shut off.
    Type: Grant
    Filed: April 27, 2010
    Date of Patent: August 28, 2012
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Ai-Yu Pan, Chao-Rong Lai, Cheng-Yang Li
  • Publication number: 20120212145
    Abstract: An illumination brightness control apparatus receives an input voltage from a light dimmer and produces a control signal to regulate a drive signal to a power conversion switch of a switching mode power converter. The apparatus includes a voltage conditioning circuit to condition the dimmer input voltage to provide a conditioned voltage signal; an ADC circuit to sample analog data of the conditioned voltage signal at a sampling rate that is high relative to a nominal variation rate of the dimmer input voltage and to provide digital data corresponding to the sampled analog data; a digital signal processing circuit to produce a running data average of the digital data; and a controller to produce a signal corresponding to the running data average as the control signal to regulate the drive signal.
    Type: Application
    Filed: February 22, 2011
    Publication date: August 23, 2012
    Inventors: Wing Chi Stephen CHAN, Hing Mo Jeff Lam, Jun Pan, Stephen Wai-Yan Lai, Xiaolong He, Wai Kin Josh Cheng
  • Publication number: 20120214826
    Abstract: Disclosed herein are compounds that form covalent bonds with Bruton's tyrosine kinase (Btk). Also described are irreversible inhibitors of Btk. Methods for the preparation of the compounds are disclosed. Also disclosed are pharmaceutical compositions that include the compounds. Methods of using the Btk inhibitors are disclosed, alone or in combination with other therapeutic agents, for the treatment of autoimmune diseases or conditions, heteroimmune diseases or conditions, cancer, including lymphoma, and inflammatory diseases or conditions.
    Type: Application
    Filed: April 18, 2012
    Publication date: August 23, 2012
    Applicant: Pharmacyclics, Inc.
    Inventors: Lee Honigberg, Erik Verner, Zhengying Pan
  • Publication number: 20120215090
    Abstract: A method and apparatus for reconstruction of a region of interest for an object is provided. The reconstruction of the object may be based on chords which may fill a part, all, or more than all of the region of interest. Using chords for reconstruction may allow for reducing data acquired and/or processing for reconstructing a substantially exact image of the ROI. Moreover, various methodologies may be used in reconstructing the image, such as backprojection-filtration, and modified filtration backprojection.
    Type: Application
    Filed: February 20, 2012
    Publication date: August 23, 2012
    Inventors: Xiaochuan Pan, Yu Zou, Lifeng Yu, Chien-Min Kao, Martin King, Maryellen Giger, Dan Xia, Howard Halpern, Charles Pelizzari, Emil Y. Sidky, Seungryong Cho
  • Publication number: 20120216156
    Abstract: The present invention relates to a method of selecting a subset of patterns from a design, to a method of performing source and mask optimization, and to a computer program product for performing the method of selecting a subset of patterns from a design. According to certain aspects, the present invention enables coverage of the full design while lowering the computation cost by intelligently selecting a subset of patterns from a design in which the design or a modification of the design is configured to be imaged onto a substrate via a lithographic process. The method of selecting the subset of patterns from a design includes identifying a set of patterns from the design related to the predefined representation of the design. By selecting the subset of patterns according to the method, the selected subset of patterns constitutes a similar predefined representation of the design as the set of patterns.
    Type: Application
    Filed: October 26, 2010
    Publication date: August 23, 2012
    Applicant: ASML Netherlands B.V.
    Inventors: Hua-Yu Liu, Luoqi Chen, Hong Chen, Zhi-Pan Li, Jun Ye, Min-Chun Tsai, Youping Zhang, Yen-Wen Lu, Jiangwei Li