Patents by Inventor Pang Choong Hau

Pang Choong Hau has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6869857
    Abstract: A new method of forming shallow trench isolations without using CMP is described. A plurality of isolation trenches are etched through an etch stop layer into the semiconductor substrate leaving narrow and wide active areas between the trenches. An oxide layer is deposited over the etch stop layer and within the trenches using a high density plasma chemical vapor deposition process (HDP-CVD) having a deposition component and a sputtering component wherein after the oxide layer fills the trenches, the deposition component is discontinued while continuing the sputtering component until the oxide layer is at a desired depth. In one method, the oxide layer overlying the etch stop layer in the wide active areas is etched away. The etch stop layer and oxide layer residues are removed to complete planarized STI regions.
    Type: Grant
    Filed: November 30, 2001
    Date of Patent: March 22, 2005
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Feng Dai, Pang Choong Hau, Peter Hing, Lap Chan
  • Publication number: 20030104676
    Abstract: A new method of forming shallow trench isolations without using CMP is described. A plurality of isolation trenches are etched through an etch stop layer into the semiconductor substrate leaving narrow and wide active areas between the trenches. An oxide layer is deposited over the etch stop layer and within the trenches using a high density plasma chemical vapor deposition process (HDP-CVD) having a deposition component and a sputtering component wherein after the oxide layer fills the trenches, the deposition component is discontinued while continuing the sputtering component until the oxide layer is at a desired depth. In one method, the oxide layer overlying the etch stop layer in the wide active areas is etched away. The etch stop layer and oxide layer residues are removed to complete planarized STI regions.
    Type: Application
    Filed: November 30, 2001
    Publication date: June 5, 2003
    Applicant: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Feng Dai, Pang Choong Hau, Peter Hing, Lap Chan