Abstract: An output buffer circuit with enhanced slew rate is disclosed. A first and a second slew-rate enhancing transistor are configured to enhance the slew rate of the source transistor and the sink transistor of an output stage. A first control circuit and a second control circuit turn off the first and the second slew-rate enhancing transistors during the static state, and turn on the first and the second slew-rate enhancing transistors during the transition.

Abstract: A dual mode transient recovery control method and system is proposed, which is designed for use with a direct-current (DC) power output unit, such as a DC-DC converter, for fast transient recovery of DC output power by switching the DC-DC converter to operate between a hysteretic mode and a PWM (Pulse Width Modulation) mode. The proposed control method and system is characterized by the use of a dual-threshold scheme to compare the output voltage. This feature may discharge the transient output voltage, raised by the over-shoot, to the steady state by switching to the discharging mode, and similarly charge the transient output voltage, dropped by the under-shoot, to the steady state by switching to the charging mode. This mechanism may allow DC-DC converters with higher slew rate to make transient ripples of output voltage to return to steady state more quickly, and additionally allow a better level of noise immunity.

Abstract: A control device for fast transient recovery of the output voltage of DC-DC converters. The control device is characterized by using a dual-threshold method to compare the actually received loading voltage values on the loading terminals of DC-DC converters, i.e., a total of four threshold levels including a negative-ripple falling-edge threshold and a negative-ripple rising-edge threshold on the negative polarity, and a positive-ripple rising-edge threshold and a positive-ripple falling-edge threshold on the positive polarity. During the transient, the load current charging/discharging control device disclosed in the invention may be switched between charging and discharging mode based on the relation between two-pairs threshold values and output voltage amplitude of DC-DC converters. This mechanism may allow DC-DC converters with higher slew rate to make transient ripples on output voltage to return to steady state more quickly.

Abstract: A non-linear interpolation circuit includes current interpolation units and an I-V converter. The current interpolation units receive an operating voltage corresponding to digital image data and corresponding reference voltages to generate corresponding operating currents. When the operating voltage changes, at least one of the corresponding current interpolation units generate the corresponding operating current, and the operating currents with respect to the operating voltage are superimposed to form an interpolation current. The I-V converter converts the interpolation current into an interpolation voltage. An interpolation current generating circuit and a method for converting digital data into analog data are also disclosed herein.

Abstract: A non-linear interpolation circuit includes current interpolation units and an I-V converter. The current interpolation units receive an operating voltage corresponding to digital image data and corresponding reference voltages to generate corresponding operating currents. When the operating voltage changes, at least one of the corresponding current interpolation units generate the corresponding operating current, and the operating currents with respect to the operating voltage are superimposed to form an interpolation current. The I-V converter converts the interpolation current into an interpolation voltage. An interpolation current generating circuit and a method for converting digital data into analog data are also disclosed herein.

Abstract: A cascode-cascade power amplifier assembly is provided. Which includes a first common-source amplifier, a second common-source amplifier, a phase shift matching network coupled to the first common-source amplifier and the second common-source amplifier for providing a 90-degree phase shift and allowing less than 50% of the output power of the first common-source amplifier to be transmitted to the second common-source amplifier, a common-gate amplifier which forms a series circuit arrangement with the first-common source amplifier and a parallel circuit arrangement with the second common-source amplifier, and an equivalent quarter-wave or three-quarter wave circuit which forms a series circuit arrangement with the common-gate amplifier and a parallel circuit arrangement with the second common-source amplifier.

Abstract: An exemplary imaging module package includes a lens module and an imaging sensor module. The lens module includes a housing having a hollow top portion and a hollow bottom portion coaxially aligned with the hollow top portion. The imaging sensor module is received in the hollow bottom portion. The imaging sensor module includes an imaging sensor connected to the substrate and secured to the bottom portion, a substrate spaced from the bottom portion and defining at least one recess therein, and a plurality of passive components received in the at least one recess and wholly disposed below the imaging sensor.

Abstract: An output buffer circuit with enhanced slew rate is disclosed. A first and a second slew-rate enhancing transistor are configured to enhance the slew rate of the source transistor and the sink transistor of an output stage. A first control circuit and a second control circuit turn off the first and the second slew-rate enhancing transistors during the static state, and turn on the first and the second slew-rate enhancing transistors during the transition.

Abstract: A control device for fast transient recovery of the output voltage of DC-DC converters. The control device is characterized by using a dual-threshold method to compare the actually received loading voltage values on the loading terminals of DC-DC converters, i.e., a total of four threshold levels including a negative-ripple falling-edge threshold and a negative-ripple rising-edge threshold on the negative polarity, and a positive-ripple rising-edge threshold and a positive-ripple falling-edge threshold on the positive polarity. During the transient, the load current charging/discharging control device disclosed in the invention may be switched between charging and discharging mode based on the relation between two-pairs threshold values and output voltage amplitude of DC-DC converters. This mechanism may allow DC-DC converters with higher slew rate to make transient ripples on output voltage to return to steady state more quickly.

Abstract: A dual mode transient recovery control method and system is proposed, which is designed for use with a direct-current (DC) power output unit, such as a DC-DC converter, for fast transient recovery of DC output power by switching the DC-DC converter to operate between a hysteretic mode and a PWM (Pulse Width Modulation) mode. The proposed control method and system is characterized by the use of a dual-threshold scheme to compare the output voltage. This feature may discharge the transient output voltage, raised by the over-shoot, to the steady state by switching to the discharging mode, and similarly charge the transient output voltage, dropped by the under-shoot, to the steady state by switching to the charging mode. This mechanism may allow DC-DC converters with higher slew rate to make transient ripples of output voltage to return to steady state more quickly, and additionally allow a better level of noise immunity.

Abstract: A cascode-cascade power amplifier assembly is provided. Which includes a first common-source amplifier, a second common-source amplifier, a phase shift matching network coupled to the first common-source amplifier and the second common-source amplifier for providing a 90-degree phase shift and allowing less than 50% of the output power of the first common-source amplifier to be transmitted to the second common-source amplifier, a common-gate amplifier which forms a series circuit arrangement with the first-common source amplifier and a parallel circuit arrangement with the second common-source amplifier, and an equivalent quarter-wave or three-quarter wave circuit which forms a series circuit arrangement with the common-gate amplifier and a parallel circuit arrangement with the second common-source amplifier.

Abstract: An exemplary imaging module package includes a housing, an imaging sensor module, and a lens module. The housing includes a first chamber and a second chamber coaxially aligned with the first chamber. The imaging sensor module is positioned within the first chamber and includes a substrate, an imaging sensor, a plurality of passive components and a plurality of soldering pads. The soldering pads connect the imaging sensor to the substrate. The passive components are mounted to the substrate and wholly disposed below the imaging sensor. The lens module is positioned within the second chamber of the housing.

Abstract: An exemplary camera module includes a substrate, a printed circuit board, an imaging sensor chip, and a lens module. The substrate defines a top surface and a recessed portion in the top surface. The printed circuit board defines a bottom surface soldered to the top surface of the substrate. The imaging sensor chip is received in the recessed portion of the substrate. The lens module is positioned above the imaging sensor chip, with an optical center thereof aligned with that of the imaging sensor chip.

Abstract: An exemplary imaging module package includes a lens module and an imaging sensor module. The lens module includes a housing having a hollow top portion and a hollow bottom portion coaxially aligned with the hollow top portion. The imaging sensor module is received in the hollow bottom portion. The imaging sensor module includes an imaging sensor connected to the substrate and secured to the bottom portion, a substrate spaced from the bottom portion and defining at least one recess therein, and a plurality of passive components received in the at least one recess and wholly disposed below the imaging sensor.