Patents by Inventor Pankaj Gupta

Pankaj Gupta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12182682
    Abstract: Provided is a ticketing system adapted to retrieve a recommendation from a knowledge database in response to a received query, the ticketing system including a processor adapted to perform semantic similarity learning in textual description pairs by calculating similarity scores for similarities between the received query and tickets stored in the knowledge database of the ticketing system, wherein each textual description pair includes a textual description of the received query and a textual description of a ticket of a plurality of tickets stored in the knowledge database of the ticketing system, wherein the ticket having the maximum similarity score is identified and a solution of the identified ticket is output as the retrieved recommendation for the received query by the ticketing system.
    Type: Grant
    Filed: January 23, 2018
    Date of Patent: December 31, 2024
    Assignee: Siemens Aktiengesellschaft
    Inventors: Bernt Andrassy, Pankaj Gupta
  • Patent number: 12175520
    Abstract: Recommender Systems (RS) tend to recommend more popular items instead of the relevant long-tail items. Mitigating such popularity bias is crucial to ensure that less popular but relevant items are recommended. System described herein analyses popularity bias in session-based RS obtained via deep learning (DL) models. DL models trained on historical user-item interactions in session logs (having long-tailed item-click distributions) tend to amplify popularity bias. To understand source of this bias amplification, potential sources of bias at data-generation stage (user-item interactions captured as session logs) and model training stage are considered by the system for recommendation wherein popularity of item has causal effect on user-item interactions via conformity bias, and item ranking from models via biased training process due to class imbalance.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: December 24, 2024
    Assignee: TATA CONSULTANCY SERVICES LIMITED
    Inventors: Priyanka Gupta, Pankaj Malhotra, Ankit Sharma, Gautam Shroff, Lovekesh Vig
  • Patent number: 12173083
    Abstract: The present invention relates to novel DLL3/CD3 binding proteins. The invention also relates to nucleic acids encoding such proteins; to methods for preparing such proteins; to host cells expressing or capable of expressing such proteins; to compositions comprising such proteins; and to uses of such proteins or such compositions, in particular for therapeutic purposes in the field of cancer diseases.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: December 24, 2024
    Assignee: Boehringer Ingelheim International GmbH
    Inventors: Susanne Hipp, Paul Adam, Michael Dziegelewski, Rajkumar Ganesan, Philip Nicholas Gorman, Priyanka Gupta, Justin Scheer, Vladimir H. Voynov, Pankaj Gupta
  • Publication number: 20240415628
    Abstract: An embolic protection device with a flexible fiber-based filter element is described associated with an integrated guide structure. The integrated guide structure comprises a corewire within a hypotube having an uncut proximal section and a distal section having laser cuts through the hypotube wall. A corewire extends through the hypotube with a low friction channel, which can have a friction reducing coil between the corewire and at least a portion of the hypotube. A torque coupler restricts rotation of the corewire while allowing at least some sliding of the corewire within the hypotube that provides for actuating the filter element and for curving the laser cut hypotube. Torque coupler designs provide connection to the laser cut hypotube. The fiber bundle has an initial undeployed configuration with the fibers aligned and a deployed configuration with the fibers bent.
    Type: Application
    Filed: June 13, 2023
    Publication date: December 19, 2024
    Inventors: John Wainwright, Joseph Marrocco, Charles M T Gordon, Charles L. Anderson, Julia Holmstrom, Christian G. Monroe, Jack B. Sattell, Brendan Gonzales, Pankaj Gupta, Englong Tan
  • Patent number: 12154853
    Abstract: A method of forming a microelectronic device comprises forming a stack structure comprising vertically alternating insulating structures and conductive structures arranged in tiers. Each of the tiers individually comprises one of the insulating structures and one of the conductive structures. A sacrificial material is formed over the stack structure and pillar structures are formed to extend vertically through the stack structure and the sacrificial material. The method comprises forming conductive plug structures within upper portions of the pillar structures, forming slots extending vertically through the stack structure and the sacrificial material, at least partially removing the sacrificial material to form openings horizontally interposed between the conductive plug structures, and forming a low-K dielectric material within the openings. Microelectronic devices, memory devices, and electronic systems are also described.
    Type: Grant
    Filed: February 6, 2023
    Date of Patent: November 26, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Naveen Kaushik, Sidhartha Gupta, Pankaj Sharma, Haitao Liu
  • Patent number: 12154040
    Abstract: Session-based Recommendation (SR) is the task of recommending the next item based on previously recorded user interactions. However, most existing approaches for SR either rely on costly online interactions with real users (model-free approaches) or rely on potentially biased rule-based or data-driven user-behavior models (model-based approaches) for learning. This disclosure relates to a system and method for selecting session-based recommendation policies using historical recommendations and user feedback. Herein, the learning of recommendation policies given offline or batch data from old recommendation policies based on a Distributional Reinforcement Learning (DRL) based recommender system in the offline or batch-constrained setting without requiring access to a user-behavior model or real-interactions with the users.
    Type: Grant
    Filed: March 8, 2021
    Date of Patent: November 26, 2024
    Assignee: Tata Consultancy Services Limited
    Inventors: Diksha Garg, Pankaj Malhotra, Priyanka Gupta, Lovekesh Vig, Gautam Shroff
  • Publication number: 20240382123
    Abstract: A device includes a controller configured to activate an application on the device, present a cognitive test through the application. The cognitive test includes a plurality of sub-tests including at least two of a typing accuracy and speed test, a speech slurring test, a reaction time test, a depth perception test, and a puzzle test. The controller is configured to determine whether the driver passed each of the sub-tests based on inputs received from the driver, and determine whether the driver is drunken based on results of the sub-tests.
    Type: Application
    Filed: May 17, 2023
    Publication date: November 21, 2024
    Applicants: Toyota Motor North America, Inc., Toyota Jidosha Kabushiki Kaisha
    Inventors: Kush Aggarwal, Palak Bhargava, Johns Roy, Darshan Vijaykumar, Angel Khushi Patel, Kennedy Myles, Vyshnavi Nalla, Anna Shelukha, Robert W. Douglas, II, Nithila Shenoy, Blake Garibaldi, Benjamin Jacob Thomas, Nodoka Sasaki, Sai Krishna Veeravelli, Sumit Rashinkar, Umer Rehman, Vadim Vernydub, Yusei Harada, Andrew Gordon, Sangeeta Gupta, Joseph Cook, Chandan Mazumdar, Pankaj Devgun, Jaya Kumari
  • Patent number: 12146000
    Abstract: This invention relates to binding molecules that bind specifically to CD137 and FAP and their use in medicine, pharmaceutical compositions containing the same, and methods of using the same as agents for treatment and/or prevention of cancer.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: November 19, 2024
    Assignee: Boehringer Ingelheim International GmbH
    Inventors: Eric Borges, Pankaj Gupta, Daniel Christopher Rowe, Justin M. Scheer, Abdallah Souabni, Inigo Tirapu, Joseph Ronald Tumang
  • Patent number: 12141544
    Abstract: An accelerator for bitonic sorting includes a plurality of compare-exchange circuits and a first-in, first-out (FIFO) buffer associated with each of the compare-exchange circuits. An output of each FIFO buffer is a FIFO value. The compare-exchange circuits are configured to, in a first mode, store a previous value from a previous compare-exchange circuit or a memory to its associated FIFO buffer and pass a FIFO value from its associated FIFO buffer to a subsequent compare-exchange circuit or the memory; in a second mode, compare the previous value to the FIFO value, store the greater value to its associated FIFO buffer, and pass the lesser value to the subsequent compare-exchange circuit or the memory; and in a third mode, compare the previous value to the FIFO value, store the lesser value to its associated FIFO buffer, and pass the greater value to the subsequent compare-exchange circuit or the memory.
    Type: Grant
    Filed: June 15, 2023
    Date of Patent: November 12, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Indu Prathapan, Puneet Sabbarwal, Pankaj Gupta
  • Patent number: 12137553
    Abstract: A method used in forming a memory array comprises forming a stack comprising vertically-alternating insulative tiers and conductive tiers. Channel-material strings of memory-cell strings extend through the insulative and conductive tiers. Conductive vias are formed above and individually electrically coupled to individual of the channel-material strings. Insulating material is laterally-between immediately-adjacent of the conductive vias. At least some of the insulating material is vertically removed to form an upwardly-open void-space that is circumferentially about multiple of the conductive vias. Insulative material is formed laterally-between the immediately-adjacent conductive vias to form a covered void-space from the upwardly-open void-space. Digitlines are formed above that are individually electrically coupled to a plurality of individual of the conductive vias there-below. Other embodiments, including structure independent of method, are disclosed.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: November 5, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Sidhartha Gupta, Naveen Kaushik, Pankaj Sharma
  • Patent number: 12136035
    Abstract: Several applications capture data from sensors resulting in multi-sensor time series. Existing neural networks-based approaches for such multi-sensor/multivariate time series modeling assume fixed input-dimension/number of sensors. Such approaches can struggle in practical setting where different instances of same device/equipment come with different combinations of installed sensors. In the present disclosure, neural network models are trained from such multi-sensor time series having varying input dimensionality, owing to availability/installation of different sensors subset at each source of time series. Neural network (NN) architecture is provided for zero-shot transfer learning allowing robust inference for multivariate time series with previously unseen combination of available dimensions/sensors at test time.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: November 5, 2024
    Assignee: TATA CONSULTANCY SERVICES LIMITED
    Inventors: Jyoti Narwariya, Pankaj Malhotra, Vibhor Gupta, Vishnu Tankasala Veparala, Lovekesh Vig, Gautam Shroff
  • Patent number: 12130378
    Abstract: A system includes a hardware accelerator configured to perform a two-dimensional (2D) fast Fourier transform (FFT) on an M×N element array. The hardware accelerator has log2 M×N pipeline stages including an initial group of log2 M stages and a final group of log2 N stages. Each stage includes a butterfly unit, a FIFO buffer coupled to the butterfly unit, and a multiplier coupled to the butterfly unit and to an associated twiddle factor table. The hardware accelerator also includes butterfly control logic to provide elements of the M×N element array to the initial group of stages in an N direction of the array, and twiddle factor addressing logic to, for the twiddle factor tables of the initial group of stages, apply an indexed entry of the twiddle factor table to the associated multiplier. The indexed entry begins as a first entry and advances by N entries after every N cycles.
    Type: Grant
    Filed: January 11, 2022
    Date of Patent: October 29, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Pankaj Gupta, Karthik Ramasubramanian
  • Publication number: 20240356496
    Abstract: An example apparatus includes: memory having a terminal, the memory to store machine-readable instructions and adjacent channel leakage data; and programmable circuitry having a terminal coupled to the terminal of the memory, the programmable circuitry to execute the machine-readable instructions to: determine a range of out-of-band frequencies responsive to adjacent channel leakage ratio data; generate weight values responsive to electromagnetic emissions within the range of out-of-band frequencies of a first signal; modify a pre-distortion function responsive to the weight values; and apply the modified pre-distortion function to generate a second signal, the second signal to exhibit fewer emissions in the range of out-of-band frequencies than the first signal during transmission.
    Type: Application
    Filed: March 25, 2024
    Publication date: October 24, 2024
    Inventors: Pankaj Gupta, Jawaharlal Tangudu, Manchi Sankalkar Ajay, Mathews John, Jaiganesh Balakrishnan, Neeraj Kumar Sharma
  • Publication number: 20240345805
    Abstract: A system includes Radix-22 butterfly stages, each including first and second Radix-22 butterfly circuits, in which the first Radix-22 butterfly circuit of a first Radix-22 butterfly stage includes a data input coupled to a system data input, and one of the first Radix-22 butterfly circuit and the second Radix-22 butterfly circuit of a last Radix-22 butterfly stage includes a data output coupled to a system data output. The system further includes a Radix-3 butterfly circuit including a data input coupled to the system data input and a data output selectively couplable to a data input of one of the first or second Radix-22 butterfly circuits of a second or later Radix-22 butterfly stage based on a particular point transform to be performed by the system. A set of memories are used by either the first Radix-22 butterfly stage or the Radix-3 butterfly circuit, depending on the particular point transform.
    Type: Application
    Filed: June 25, 2024
    Publication date: October 17, 2024
    Inventors: Pankaj GUPTA, Karthik SUBBURAJ, Sujaata RAMALINGAM, Karthik RAMASUBRAMANIAN, Indu PRATHAPAN
  • Patent number: 12119176
    Abstract: Some embodiments include an integrated assembly having a supercapacitor supported by a semiconductor substrate. The supercapacitor includes first and second electrode bases. The first electrode base includes first laterally-projecting regions, and the second electrode base includes second laterally-projecting regions which are interdigitated with the first laterally-projecting regions. A distance between the first and second laterally-projecting regions is less than or equal to about 500 nm. Carbon nanotubes extend upwardly from the first and second electrode bases. The carbon nanotubes are configured as a first membrane structure associated with the first electrode base and as a second membrane structure associated with the second electrode base. Pseudocapacitive material is dispersed throughout the first and second membrane structures. Electrolyte material is within and between the first and second membrane structures. Some embodiments include methods of forming integrated assemblies.
    Type: Grant
    Filed: February 19, 2021
    Date of Patent: October 15, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Pankaj Sharma, Sidhartha Gupta
  • Patent number: 12101385
    Abstract: Techniques for processing web probes for monitoring user experience including use of caching to prevent a surge of web probes on destination servers and for detecting web probe traffic. A method implemented by a connector includes intercepting a Hypertext Transfer Protocol Secure (HTTPS) web probe request to a server, identifying a cache hit associated with the request in a cache, generating a synthetic Hypertext Transfer Protocol (HTTP) response based on information from the identified cache hit, wherein the generated synthetic HTTP response includes an extension header containing collected statistics, and sending the synthetic HTTP response. The method can further include simulating a Secure Socket Layer (SSL) handshake to estimate SSL cost.
    Type: Grant
    Filed: June 30, 2023
    Date of Patent: September 24, 2024
    Assignee: Zscaler, Inc.
    Inventors: John A. Chanak, Chakkaravarthy Periyasamy Balaiah, Sandeep Kamath, Vikas Mahajan, Barrett Hostetter-Lewis, Gregory Rybinski, Rishabh Gupta, Pankaj Chhabra
  • Patent number: 12057854
    Abstract: An example apparatus includes: nonlinearity function selection circuitry with an output, the nonlinearity function selection circuitry to select a type of a nonlinearity function, the nonlinearity function to model nonlinearity portions of data output from an analog-to-digital converter, nonlinearity function term generation circuitry with a first input coupled to the output, the nonlinearity function term generation circuitry to generate one or more nonlinearity function terms of the nonlinearity function based on the type of the nonlinearity function and the data, and coefficient determination circuitry with a second input coupled to the output, the coefficient determination circuitry to determine one or more nonlinearity function coefficients based on the one or more nonlinearity function terms, the nonlinearity portions of the data to be compensated based on the one or more nonlinearity function coefficients.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: August 6, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Pankaj Gupta, Ajai Paulose, Sreenath Narayanan Potty, Divyansh Jain, Jaiganesh Balakrishnan, Jawaharlal Tangudu, Aswath VS, Girish Nadiger, Ankur Jain
  • Patent number: 12051099
    Abstract: This disclosure relates generally to method and system for handling popularity bias in item recommendations. In an embodiment the method includes initializing an item embedding look-up matrix corresponding to items in a sequence of item-clicks with respect to a training data. L2 norm is applied to the item embedding look-up matrix to learn a normalized item embeddings. Using a neural network, a session embeddings corresponding to the sequences of item-clicks is modeled and L2 norm is applied to the session embeddings to obtain a normalized session embeddings. Relevance scores corresponding to each of the plurality of items are obtained based on similarity between the normalized item embeddings and the normalized session embeddings. A multi-dimensional probability vector corresponding to the relevance scores for the items to be clicked in the sequence is obtained. A list of the items ordered based on the multi-dimensional probability vector is provided as recommendation.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: July 30, 2024
    Assignee: TATA CONSULTANCY SERVICES LIMITED
    Inventors: Pankaj Malhotra, Priyanka Gupta, Diksha Garg, Lovekesh Vig, Gautam Shroff
  • Patent number: 12044400
    Abstract: This disclosure relates generally to a method and system for real time monitoring and forecasting of fouling of an air preheater (APH) in a thermal power plant. The system is deploying a digital replica or digital twin that works in tandem with the real APH of the thermal power plant. The system receives real-time data from one or more sources and provides real-time soft sensing of intrinsic parameters as well as that of health, fouling related parameters of APH. The system is also configured to diagnose the current class of fouling regime and the reasons behind a specific class of fouling regime of the APH. The system is also configured to be used as advisory system that alerts and recommends corrective actions in terms of either APH parameters or parameters controlled through other equipment such as selective catalytic reduction or boiler or changes in operation or design.
    Type: Grant
    Filed: October 9, 2020
    Date of Patent: July 23, 2024
    Assignee: TATA CONSULTANCY SERVICES LIMITED
    Inventors: Anirudh Deodhar, Vishal Jadhav, Ashit Gupta, Muralikrishnan Ramanujam, Venkataramana Runkana, Mukul Patil, Charan Theja Dhanda, Dhandapani Subramaniam, Lalith Roshanlal Jain, Joel Thomson Diraviam Andrew, Pankaj Malhotra, Sai Prasad Parameswran
  • Patent number: 12045582
    Abstract: A Radix-3 butterfly circuit includes a first FIFO input configured to couple to a first FIFO. The circuit includes a first adder and first subtractor coupled to the first FIFO input, and a second FIFO input configured to couple to a second FIFO. The circuit includes a second adder and second subtractor coupled to the second FIFO input, and an input terminal coupled to the first adder and first subtractor. The circuit includes a first scaler coupled to the second adder and a first multiplexer, and a second scaler coupled to a third adder and second multiplexer. The circuit includes a third scaler coupled to a third subtractor and third multiplexer. An output of the first multiplexer is coupled to a complex multiplier. An output of the second multiplexer is coupled to a second FIFO output. An output of the third multiplexer is coupled to a first FIFO output.
    Type: Grant
    Filed: June 18, 2021
    Date of Patent: July 23, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Pankaj Gupta, Karthik Subburaj, Sujaata Ramalingam, Karthik Ramasubramanian, Indu Prathapan