Abstract: A touch-sensing circuit and a touch-judging method are provided. The touch-sensing circuit controls the charging process or the discharging process of a sensing capacitor by a charge-discharge control unit. The first comparator and the second comparator are connected to the sensing capacitor to compare whether the voltage level of the sensing capacitor is higher than the preset high voltage or lower than the preset low voltage. The crossing detection unit receives the output pulse of the comparator and samples the first duration before the output pulse has a state transition and the second duration after the output pulse has the state transition. When the second duration is greater than the first duration, a switching signal is sent to the charge-discharge control unit to switch between the charging and discharging processes.

Abstract: A touch-sensing circuit and a touch-judging method are provided. The touch-sensing circuit controls the charging process or the discharging process of a sensing capacitor by a charge-discharge control unit. The first comparator and the second comparator are connected to the sensing capacitor to compare whether the voltage level of the sensing capacitor is higher than the preset high voltage or lower than the preset low voltage. The crossing detection unit receives the output pulse of the comparator and samples the first duration before the output pulse has a state transition and the second duration after the output pulse has the state transition. When the second duration is greater than the first duration, a switching signal is sent to the charge-discharge control unit to switch between the charging and discharging processes.

Abstract: A detection circuit is provided in the invention. The detection circuit includes a synchronous circuit, a comparison circuit and a fail-signal generating circuit. The comparison circuit is coupled to the synchronous circuit. The comparison circuit compares a target signal with a reference signal to generate a comparison result. The frequency of the reference signal is lower than the frequency of the target signal. The fail-signal generates circuit is coupled to the synchronous circuit and the comparison circuit. The fail-signal receives the comparison circuit. According to the comparison circuit, the fail-signal determines whether the target signal has failed.

Abstract: A clock multiplier is provided. The clock multiplier includes a delay line, an output clock generator, and a delay controller. The delay line receives an input clock and delays the input clock according to a selection signal group with multiple bits to provide a plurality of delayed clocks and a feedback clock. The output clock generator performs a logic operation on the input clock and a portion of the delayed clocks to generate an output clock. A frequency of the output clock is an integer multiple of a frequency of the input clock. The delay controller adjusts the selection signal group according to a timing difference between the input clock and the feedback clock, so that a transition point of the feedback clock approaches a transition point of the input clock.

Abstract: A detection circuit is provided in the invention. The detection circuit includes a synchronous circuit, a comparison circuit and a fail-signal generating circuit. The comparison circuit is coupled to the synchronous circuit. The comparison circuit compares a target signal with a reference signal to generate a comparison result. The frequency of the reference signal is lower than the frequency of the target signal. The fail-signal generates circuit is coupled to the synchronous circuit and the comparison circuit. The fail-signal receives the comparison circuit. According to the comparison circuit, the fail-signal determines whether the target signal has failed.

Abstract: A clock multiplier is provided. The clock multiplier includes a delay line, an output clock generator, and a delay controller. The delay line receives an input clock and delays the input clock according to a selection signal group with multiple bits to provide a plurality of delayed clocks and a feedback clock. The output clock generator performs a logic operation on the input clock and a portion of the delayed clocks to generate an output clock. A frequency of the output clock is an integer multiple of a frequency of the input clock. The delay controller adjusts the selection signal group according to a timing difference between the input clock and the feedback clock, so that a transition point of the feedback clock approaches a transition point of the input clock.

Abstract: A biasing circuit providing power to a microphone is disclosed. The biasing circuit includes a first impedance element, a second impedance element, a detection circuit and a control circuit. The first impedance element has a first impedance and is coupled between a first power node and a first terminal of the microphone. The second impedance element has a second impedance and is coupled between a second terminal of the microphone and a second power node. The detection circuit is coupled between the first and second terminals and generates a detection signal according to an analog signal generated by the microphone. The control circuit adjusts the first and second impedances according to the detection signal.

Abstract: A system electrostatic discharge circuit is provided. The system electrostatic discharge circuit includes a first transient voltage suppressor diode and a first resistance element. The first resistance element and the first transient voltage suppressor diode are coupled in series between a first power line and a second power line. In addition, a resistance value of the first resistance element is proportional to a sum of currents flowing through the first resistance element.

Abstract: A biasing circuit providing power to a microphone is disclosed. The biasing circuit includes a first impedance element, a second impedance element, a detection circuit and a control circuit. The first impedance element has a first impedance and is coupled between a first power node and a first terminal of the microphone. The second impedance element has a second impedance and is coupled between a second terminal of the microphone and a second power node. The detection circuit is coupled between the first and second terminals and generates a detection signal according to an analog signal generated by the microphone. The control circuit adjusts the first and second impedances according to the detection signal.

Abstract: A system electrostatic discharge circuit is provided. The system electrostatic discharge circuit includes a first transient voltage suppressor diode and a first resistance element. The first resistance element and the first transient voltage suppressor diode are coupled in series between a first power line and a second power line. In addition, a resistance value of the first resistance element is proportional to a sum of currents flowing through the first resistance element.

Abstract: A microcontroller is provided and includes a reset pin, a reset circuit, and a first logical circuit. A first reset signal is generated at the reset pin when the microcontroller is powered on. The reset circuit receives the first reset signal and generates a second reset signal. The reset circuit includes a plurality of flipflops. After the microcontroller is powered on, the reset circuit switches a state of the second reset signal according to the first reset signal when an output combination of a plurality of output values of the plurality of flipflops is not a specific value. The first logical circuit performs a first initialization operation when the state of the second reset signal is switched. When the second reset signal is switched, the reset circuit sets the output combination of the plurality of output values of the plurality of flipflops to the specific value.

Abstract: A control circuit for stopping a booster circuit and an electronic apparatus using the control circuit are described. The electronic apparatus includes a control circuit, a booster circuit and an electronic device. The control circuit is electrically coupled to the booster circuit and the battery. The booster circuit is electrically coupled to the battery and the electronic device. The booster circuit is used to boost the battery voltage, to generate an output voltage for operation of the electronic device and the control circuit. The control circuit may stop the operation of the booster circuit when the battery voltage is not higher than the first voltage, and when a number of occurrences in which the battery voltage falls below the first voltage reaches a predetermined number, or the output voltage does not reach a second voltage within a predetermined time interval.

Abstract: A control circuit for stopping a booster circuit and an electronic apparatus using the control circuit are described. The electronic apparatus includes a control circuit, a booster circuit and an electronic device. The control circuit is electrically coupled to the booster circuit and the battery. The booster circuit is electrically coupled to the battery and the electronic device. The booster circuit is used to boost the battery voltage, to generate an output voltage for operation of the electronic device and the control circuit. The control circuit may stop the operation of the booster circuit when the battery voltage is not higher than the first voltage, and when a number of occurrences in which the battery voltage falls below the first voltage reaches a predetermined number, or the output voltage does not reach a second voltage within a predetermined time interval.

Abstract: A driving method of a field sequential display apparatus is provided. First, a plurality of scan lines of the field sequential display apparatus are sequentially driven according to a scanning sequence in a first period of a first field, wherein the first field is in a first frame. Next, the scan lines are sequentially driven according to an opposite sequence in a second period of the first field, wherein the opposite sequence is in the reverse order of the scanning sequence. Finally, the scan lines are simultaneously driven or not driven in a third period of the first field. Consequently, the disclosed driving method can promote the uniformity of the image brightness.

Abstract: A driver of a field sequential display is provided. The driver includes a first power device, a second power device, and a driving waveform generator. The first power device generates a first power when the field sequential display is in a color mode. The second power device generates a second power when the field sequential display is in a monochrome mode. The voltage and current of the second power are respectively smaller than the voltage and the current of the first power. The driving waveform generator coupled to the first power device and the second power device and generates a plurality of scan signals and a plurality of display signals according to the first power or the second power, so as to drive a display panel of the field sequential display.

Abstract: A driver of a field sequential display is provided. The driver includes a first power device, a second power device, and a driving waveform generator. The first power device generates a first power when the field sequential display is in a color mode. The second power device generates a second power when the field sequential display is in a monochrome mode. The voltage and current of the second power are respectively smaller than the voltage and the current of the first power. The driving waveform generator coupled to the first power device and the second power device and generates a plurality of scan signals and a plurality of display signals according to the first power or the second power, so as to drive a display panel of the field sequential display.

Abstract: A driving method of a field sequential display apparatus is provided. First, a plurality of scan lines of the field sequential display apparatus are sequentially driven according to a scanning sequence in a first period of a first field, wherein the first field is in a first frame. Next, the scan lines are sequentially driven according to an opposite sequence in a second period of the first field, wherein the opposite sequence is in the reverse order of the scanning sequence. Finally, the scan lines are simultaneously driven or not driven in a third period of the first field. Consequently, the disclosed driving method can promote the uniformity of the image brightness.