Abstract: A driver arrangement (10) comprises a digital controller (11) that is configured to receive a digital input signal (SDI) and a driver (12) that comprises a driver input (14) and a driver output (15) and is configured to provide an analog output signal (SANO) at the driver output (15). The driver arrangement (10) comprises a coupling circuit (13) that comprises a digital-to-analog converter (19) and a feedback circuit (24). The digital-to-analog converter (19) comprises a converter input (20) coupled to the digital controller (11) and a converter output (21) coupled to the driver input (14). The feedback circuit (24) is coupled to the driver output (15) and to a feedback input (17) of the digital controller (11).

Abstract: A driver arrangement (10) comprises a digital controller (11) that is configured to receive a digital input signal (SDI) and a driver (12) that comprises a driver input (14) and a driver output (15) and is configured to provide an analog output signal (SANO) at the driver output (15). The driver arrangement (10) comprises a coupling circuit (13) that comprises a digital-to-analog converter (19) and a feedback circuit (24). The digital-to-analog converter (19) comprises a converter input (20) coupled to the digital controller (11) and a converter output (21) coupled to the driver input (14). The feedback circuit (24) is coupled to the driver output (15) and to a feedback input (17) of the digital controller (11).

Abstract: An electronic module (100) has a first and a second circuit (200, 300) with respective first and second output connections (230, 330), respective first and second reference potential connections (220, 320), and respective first and second sensing connections (240, 340), each circuit (200, 300) comprising a respective sensing block (250, 350), which at its input side is connected to the respective sensing connection (240, 340) and to the respective reference potential connection (220, 320). The first sensing connection (240) is either connected to the first output connection (230) or to the second output connection (330). The second sensing connection (340) is connected to the second output connection (330). The sensing blocks (250, 350) are configured to detect a failure of the electronic module (100) with respect to its respective reference potential connection (220, 320) and to indicate a detected failure by providing a failure signal at its respective output connection (230, 330).

Abstract: An electronic module (100) has a first and a second circuit (200, 300) with respective first and second output connections (230, 330), respective first and second reference potential connections (220, 320), and respective first and second sensing connections (240, 340), each circuit (200, 300) comprising a respective sensing block (250, 350), which at its input side is connected to the respective sensing connection (240, 340) and to the respective reference potential connection (220, 320). The first sensing connection (240) is either connected to the first output connection (230) or to the second output connection (330). The second sensing connection (340) is connected to the second output connection (330). The sensing blocks (250, 350) are configured to detect a failure of the electronic module (100) with respect to its respective reference potential connection (220, 320) and to indicate a detected failure by providing a failure signal at its respective output connection (230, 330).

Abstract: A coupling circuit has a first and a second transistor (P1, P2) of a p-channel field-effect transistor type. A drain terminal of the first transistor (P1) is connected to a signal input (1), source terminals of the first and the second transistor (P1, P2) are commonly connected to a signal output (2), bulk terminals of the first and the second transistor (P1, P2) are commonly connected to a drain terminal of the second transistor (P2), and a gate terminal of the first transistor (P1) is connected to a gate terminal of the second transistor (P2). The coupling circuit further comprises a gate control circuit (10) with a charge pump circuit (110) which is configured to generate a negative potential. The gate control circuit (10) is configured to control a gate voltage at the gate terminals of the first and the second transistor (P1, P2) based on a negative potential.

Abstract: A coupling circuit has a first and a second transistor (P1, P2) of a p-channel field-effect transistor type. A drain terminal of the first transistor (P1) is connected to a signal input (1), source terminals of the first and the second transistor (P1, P2) are commonly connected to a signal output (2), bulk terminals of the first and the second transistor (P1, P2) are commonly connected to a drain terminal of the second transistor (P2), and a gate terminal of the first transistor (P1) is connected to a gate terminal of the second transistor (P2). The coupling circuit further comprises a gate control circuit (10) with a charge pump circuit (110) which is configured to generate a negative potential. The gate control circuit (10) is configured to control a gate voltage at the gate terminals of the first and the second transistor (P1, P2) based on a negative potential.

Abstract: An RC oscillator circuit is disclosed. The RC oscillator circuit includes a current generator configured to generate a charge current. The RC oscillator circuit also includes an integrator having an input and an output, the input being connected to the current generator. The RC oscillator circuit also includes a comparator having a first input, a second input, and an output, the first input being connected to the output of the integrator and the second input being configured to supply a reference threshold. The RC oscillator circuit also includes a clock pulse generator connected to the output of the comparator and a reference generator configured to generate the reference threshold based on a supply voltage of the RC oscillator circuit.

Abstract: Circuitry for use in a differential amplifier includes an input stage having a first differential amplifier and an offset compensation stage that includes at least one controllable current source. The offset compensation stage is connected to a bias input of the first differential amplifier. The circuitry includes an output stage having a second differential amplifier, where the output stage is after an output of the input stage, and a programmable resistor network for controlling an amplification of the input stage. The programmable resistor network controls the amplification in accordance with a feedback from the first differential amplifier.

Abstract: A differential amplifier arrangement (53) comprising an input stage (1) and an output stage (2) is described. The input stage (1) comprises a differential amplifier (3, 4) to which an offset compensation stage (10) is connected, which comprises at least one controllable current source (11) and which controls a bias signal of the differential amplifier (3, 4). With the described differential amplifier arrangement, which can preferably be used as an instrumentation amplifier, very precise compensation of input offsets can be carried out.

Abstract: An RC oscillator circuit is described in which a charge current (IPOSC1) is integrated in an integrator (1). In a comparator (7), an output voltage (VCAP) of the integrator is compared to a reference threshold (VTH). Depending on the comparison, a periodic signal is generated in a clock pulse generator (9). Furthermore, a reference generator (8) is provided, which generates the reference threshold (VTH) depending on the temperature and on the supply voltage of the entire circuit. In this way, the frequency dependence of the oscillator is largely compensated for as far as fluctuations in the supply voltage are concerned.