Abstract: A color image processing pipeline performs an interpolation on color data to generate triplets located at distinct pixel locations. The pipeline includes defect correction and image enhancement blocks having a first color interpolation block for generating RGB information for each pixel of an input image pixel pattern, and a second color interpolation block for receiving the RGB information to provide enhanced RGB pattern pixels. Dedicated line memories and delay circuits associated with the defect correction and image enhancement blocks permit real-time processing of pixel data. First and second read/write buffers store a subset or pixel block of the image data, and invert a scanning mode of pixel data being fed to the dedicated line memories and delay circuits associated to at least the first color interpolation block, from row-wise to column-wise, for each subset of data to be stored therein.