Patents by Inventor Paolo Henrique Bernardi

Paolo Henrique Bernardi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for programming a field programmable gate array and network configuration
    Patent number: 11171653
    Abstract: A method for programming a Field Programmable Gate Array (FPGA) via a network, the network being operated according to a predetermined communications protocol, can include: establishing a communication connection between the FPGA and an external master, setting the FPGA into a programming mode, the master providing an FPGA programming image to the FPGA in a sequence of frames so that the frames can be parsed and enabling the FPGA to write only during receiving the payload section of the frames. The FPGA programming image and parsing the sequence of frames can be performed by a permanently programmed or hardwired logic component. A network, FPGA, and a communication system can be configured to utilize embodiments of the method.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: November 9, 2021
    Assignee: Unify Patente GmbH & Co. KG
    Inventors: Marcelo Samsoniuk, Paolo Henrique Bernardi, Diogo Wachtel Granado
  • METHOD FOR PROGRAMMING A FIELD PROGRAMMABLE GATE ARRAY AND NETWORK CONFIGURATION
    Publication number: 20200321965
    Abstract: A method for programming a Field Programmable Gate Array (FPGA) via a network, the network being operated according to a predetermined communications protocol, can include: establishing a communication connection between the FPGA and an external master, setting the FPGA into a programming mode, the master providing an FPGA programming image to the FPGA in a sequence of frames so that the frames can be parsed and enabling the FPGA to write only during receiving the payload section of the frames. The FPGA programming image and parsing the sequence of frames can be performed by a permanently programmed or hardwired logic component. A network, FPGA, and a communication system can be configured to utilize embodiments of the method.
    Type: Application
    Filed: December 28, 2017
    Publication date: October 8, 2020
    Inventors: Marcelo Samsoniuk, Paolo Henrique Bernardi, Diogo Wachtel Granado