Abstract: A machine for removing sharp edge in plates in general and in glass plates in particular, comprising a frame for the support and advancement of a plate on which there is at least one station for arrissing an edge of the plate, the arrissing station comprising an upper tangential grinding wheel and a lower tangential grinding wheel which have a working profile which is inclined at 45° with respect to the rotation axis of the grinding wheels and can engage respectively an upper edge and a lower edge of the plate being worked.

Abstract: A bilateral machine for processing panes shaped like a parallelogram with non-right angles, comprising an input station downstream of which there is a first bilateral unit which leads to an angle transfer assembly which is arranged upstream of a second bilateral unit, the angle transfer assembly comprising elements for rotation on the plane of arrangement of the pane being processed and elements which can be activated selectively for the alignment of the unprocessed edge of the pane being processed.

Abstract: An apparatus for verifying the data retention in a non-volatile memory is described which comprises at least one multiplexer and at least one shift register. The multiplexer and the at least one shift register are disposed so that the data of the non-volatile memory are in input to the multiplexer the output of which is in turn in input to the at least one shift register. The apparatus comprises a logical circuitry which by suitable commands controls the data transfer from said multiplexer to said at least one shift register, the data loading and the output data shifting in said at least one shift register.

Abstract: An integrated device comprises at least one circuit element and a plurality of trimming elements which can be connected selectively to the at least one circuit element in order to achieve a predetermined tolerance of a characteristic parameter of the at least one circuit element; the integrated device includes a plurality of electronic switches, each of which can be switched between a first state and a second state in which it activates and deactivates a corresponding one of the trimming elements, respectively, and a memory for storing an indication of the states of the electronic switches and for operating each electronic switch in the first state or in the second state according to the indication stored.

Abstract: A method for testing a programmable, nonvolatile memory including a matrix of memory cells is provided. A plurality of memory cells are programmed. The programmed memory cells are addressed in succession to identify a lowest of threshold voltage levels. The addressing for each memory location includes applying a selection voltage that is lower than the lowest threshold voltage level corresponding to a memory location currently being addressed. The bits are read from the programmed memory cells for the memory location currently being addressed. The reading is repeated while progressively changing the selection voltage supplied to the word line corresponding to the memory location currently being addressed until it is detected that at least one of the bits of the memory location currently being addressed has switched from a first logic level corresponding to a reading of a programmed memory cell to a second logic level corresponding to a reading of a non-programmed memory cell.

Abstract: An active pull-up circuit for connection to an input pin that receives high and low logic level signals and a high voltage signal whose level is higher than the high logic level. The active pull-up circuit includes a pull-up circuit that is coupled between the input pin and a voltage supply line, and a breaking circuit that is coupled between the pull-up circuit and the voltage supply line. The pull-up circuit selectively brings the input pin to the level of the voltage supply line, and the breaking circuit operates to inhibit the pull-up circuit when the high voltage signal is on the input pin. In a preferred embodiment, the breaking circuit inhibits the pull-up circuit by electrically isolating the pull-up circuit from the voltage supply line. A method for selectively pulling-up an input node is also provided.

Abstract: A method for testing a programmable, non-volatile memory including a matrix of memory cells is provided. A plurality of memory cells are programmed. The programmed memory cells are addressed in succession to identify a lowest of threshold voltage levels. The addressing for each memory location includes applying a selection voltage that is lower than the lowest threshold voltage level corresponding to a memory location currently being addressed. The bits are read from the programmed memory cells for the memory location currently being addressed. The reading is repeated while progressively changing the selection voltage supplied to the word line corresponding to the memory location currently being addressed until it is detected that at least one of the bits of the memory location currently being addressed has switched from a first logic level corresponding to a reading of a programmed memory cell to a second logic level corresponding to a reading of a non-programmed memory cell.

Abstract: An integrated device comprises at least one circuit element and a plurality of trimming elements which can be connected selectively to the at least one circuit element in order to achieve a predetermined tolerance of a characteristic parameter of the at least one circuit element; the integrated device includes a plurality of electronic switches, each of which can be switched between a first state and a second state in which it activates and deactivates a corresponding one of the trimming elements, respectively, and means for storing an indication of the states of the electronic switches and for operating each electronic switch in the first state or in the second state according to the indication stored.

Abstract: Switching losses in a DC-to-DC converter idling in a pulse-skipping mode are reduced by inhibiting any intervening turn-off command by a PWM control loop of the converter for as long as the current through the inductor of the converter remains below a minimum threshold value set by a dedicated comparator. The method is implemented by employing a comparator with a certain hysteresis and by logically masking the switching to a logic "0" of a high frequency clock (switching) signal of the converter for the entire period of time the current in the inductor remains below the minimum threshold.

Abstract: A DC-to-DC (buck) converter comprises a PWM regulation loop and a hysteretic control loop, which are alternatively enabled by a mode selection circuit of the converter in function of the load level. When the level of load drops below a preset limit related to a design load level, the converter passes from a PWM control mode to a hysteretic control mode, thus eliminating switching losses during periods of operation at relatively low load level.

Abstract: A circuit for regulating the charging time of the output node of an amplifier at start up. The output node commonly comprises an external soft-start capacitor charged by a current delivered by a pull-up transistor of a push-pull output stage of the amplifier, through a decoupling diode that is functionally connected between the output node of the amplifier and a terminal of the external soft-start capacitor. The present application provides a current mirror feed back circuit capable of mirroring the charge current of the external soft-start capacitor onto the driving node of the pull-up transistor of the output stage of the amplifier. The regulating circuit permits use of an external capacitance of extremely small size. Upon the reaching of a fully charged condition by the external capacitor, the control circuit self-isolates and does not influence in any way the normal operation of the amplifier.