Abstract: An embodiment circuit comprises high-side and low-side switches arranged between supply and reference nodes, and having an intermediate node. A switching control signal is applied with opposite polarities to the high-side and low-side switches. An inductive load is coupled between the intermediate node and one of the supply and reference nodes. Current sensing circuitry is configured to sample a first value of the load current flowing in one of the high-side and low-side switches before a commutation of the switching control signal, sample a second value of the load current flowing in the other of the high-side and low-side switches after the commutation of the switching control signal, sample a third value of the load current flowing in the other of the high-side and low-side switches after the second sampling, and generate a failure signal as a function of the first, second and third sampled values of the load current.

Abstract: In an embodiment, an electronic circuit includes: a controller configured to produce a pulse-width-modulated (PWM) signal to control a first current of an electrical load; a redundant current measurement circuit configured to measure the first current and provide first and second current measurement signal; a monitor circuit coupled to the redundant current measurement circuit, the monitor circuit configured to assert a current monitor signal in response to the first and second current measurement signals being found to be matching with each other, wherein the monitor circuit is configured to: detect an absence of the asserted current monitor signal prior to expiry of a threshold time interval, and in response to detecting the absence of the asserted current monitor signal, force the controller to produce, prior to expiry of the threshold time interval, a first PWM signal pulse having a controlled duty-cycle.

Abstract: Disclosed herein is a single integrated circuit chip with a main logic that operates a vehicle component such as a valve driver. Isolated from the main logic within the chip is a safety area that operates to verify proper operation of the main logic. The safety area is internally powered by an internal regulated voltage generated by an internal voltage regulator that generates the internal regulated voltage from an external voltage while protecting against shorts of the external line delivering the external voltage. The safety area includes protection circuits that level shift external analog signals downward in voltage for monitoring within the safety area, the protection circuits serving to protect against shorts of the external line delivering the external analog signals.

Abstract: In an embodiment, an electronic circuit includes: a controller configured to produce a pulse-width-modulated (PWM) signal to control a first current of an electrical load; a redundant current measurement circuit configured to measure the first current and provide first and second current measurement signal; a monitor circuit coupled to the redundant current measurement circuit, the monitor circuit configured to assert a current monitor signal in response to the first and second current measurement signals being found to be matching with each other, wherein the monitor circuit is configured to: detect an absence of the asserted current monitor signal prior to expiry of a threshold time interval, and in response to detecting the absence of the asserted current monitor signal, force the controller to produce, prior to expiry of the threshold time interval, a first PWM signal pulse having a controlled duty-cycle.

Abstract: An embodiment circuit comprises high-side and low-side switches arranged between supply and reference nodes, and having an intermediate node. A switching control signal is applied with opposite polarities to the high-side and low-side switches. An inductive load is coupled between the intermediate node and one of the supply and reference nodes. Current sensing circuitry is configured to sample a first value of the load current flowing in one of the high-side and low-side switches before a commutation of the switching control signal, sample a second value of the load current flowing in the other of the high-side and low-side switches after the commutation of the switching control signal, sample a third value of the load current flowing in the other of the high-side and low-side switches after the second sampling, and generate a failure signal as a function of the first, second and third sampled values of the load current.

Abstract: A track regulator circuit includes an input terminal for receiving an input signal, an output stage with an output terminal for applying an output signal to a load, an error amplifier coupled to the input terminal, and a feedback resistor between the output terminal and the error amplifier for transferring to the error amplifier a feedback signal indicative of the output signal. The error amplifier is configured for driving the output stage as a function of the difference between the input signal and the output signal so that the output signal tracks the input signal. The circuit includes a current generator coupled to the feedback resistor for injecting into the feedback resistor a soft-start current to unbalance the error amplifier, with the intensity of the soft-start current gradually ramping down to zero.

Abstract: A track regulator circuit includes an input terminal for receiving an input signal, an output stage with an output terminal for applying an output signal to a load, an error amplifier coupled to the input terminal, and a feedback resistor between the output terminal and the error amplifier for transferring to the error amplifier a feedback signal indicative of the output signal. The error amplifier is configured for driving the output stage as a function of the difference between the input signal and the output signal so that the output signal tracks the input signal. The circuit includes a current generator coupled to the feedback resistor for injecting into the feedback resistor a soft-start current to unbalance the error amplifier, with the intensity of the soft-start current gradually ramping down to zero.