Patents by Inventor Papo CHEN

Papo CHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250266287
    Abstract: A susceptor for a processing chamber is provided including: an inner portion having a center; an outer rim disposed around the inner portion, the outer rim including a first inner side surface and a first outer side surface; and a plurality of apertures, each aperture extending from the first outer side surface to the first inner side surface. Each aperture of the plurality of apertures is located at a different angular location relative to the center of the inner portion.
    Type: Application
    Filed: January 22, 2025
    Publication date: August 21, 2025
    Inventors: Hui CHEN, Papo CHEN, Xinning LUAN, Shawn THOMAS
  • Patent number: 12015042
    Abstract: A method of fabricating a semiconductor device includes forming an interconnect structure over a front side of a sensor substrate, thinning the sensor substrate from a back side of the sensor substrate, etching trenches into the sensor substrate, pre-cleaning an exposed surface of the sensor substrate, epitaxially growing a charge layer directly on the pre-cleaned exposed surface of the sensor substrate, and forming isolation structures within the etched trenches.
    Type: Grant
    Filed: February 21, 2020
    Date of Patent: June 18, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Papo Chen, Schubert Chu, Errol Antonio C Sanchez, John Timothy Boland, Zhiyuan Ye, Lori Washington, Xianzhi Tao, Yi-Chiau Huang, Chen-Ying Wu
  • Publication number: 20240145246
    Abstract: Embodiments of the present technology include semiconductor processing methods. The methods may include providing a silicon-containing precursor and a dopant precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the semiconductor processing chamber. A silicon-containing material may be formed on the substrate. The methods may include contacting the silicon-containing material with the silicon-containing precursor and the dopant precursor. The methods may include forming a doped silicon-containing material on the silicon-containing material. The methods may include oxidizing the substrate. The oxidizing may form an oxidized doped silicon-containing material. The methods may include etching the oxidized doped silicon-containing material.
    Type: Application
    Filed: October 26, 2022
    Publication date: May 2, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Yi Yang, In Soo Jung, Sean S. Kang, Srinivas D. Nemani, Papo Chen, Ellie Y. Yieh
  • Patent number: 11411039
    Abstract: Generally, examples described herein relate to methods and processing chambers and systems for forming a stacked pixel structure using epitaxial growth processes and device structures formed thereby. In an example, a first sensor layer is epitaxially grown on a crystalline surface on a substrate. A first isolation structure is epitaxially grown on the first sensor layer. A second sensor layer is epitaxially grown on the first isolation structure. A second isolation structure is epitaxially grown on the second sensor layer. A third sensor layer is epitaxially grown on the second isolation structure.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: August 9, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Papo Chen, John Boland, Schubert S. Chu, Errol Antonio C. Sanchez, Stephen Moffatt
  • Publication number: 20210366976
    Abstract: Generally, examples described herein relate to methods and processing chambers and systems for forming a stacked pixel structure using epitaxial growth processes and device structures formed thereby. In an example, a first sensor layer is epitaxially grown on a crystalline surface on a substrate. A first isolation structure is epitaxially grown on the first sensor layer. A second sensor layer is epitaxially grown on the first isolation structure. A second isolation structure is epitaxially grown on the second sensor layer. A third sensor layer is epitaxially grown on the second isolation structure.
    Type: Application
    Filed: May 19, 2020
    Publication date: November 25, 2021
    Inventors: Papo CHEN, John BOLAND, Schubert S. CHU, Errol Antonio C. SANCHEZ, Stephen MOFFATT
  • Publication number: 20210265416
    Abstract: A method of fabricating a semiconductor device includes forming an interconnect structure over a front side of a sensor substrate, thinning the sensor substrate from a back side of the sensor substrate, etching trenches into the sensor substrate, pre-cleaning an exposed surface of the sensor substrate, epitaxially growing a charge layer directly on the pre-cleaned exposed surface of the sensor substrate, and forming isolation structures within the etched trenches.
    Type: Application
    Filed: February 21, 2020
    Publication date: August 26, 2021
    Inventors: Papo CHEN, Schubert CHU, Errol Antonio C SANCHEZ, John Timothy BOLAND, Zhiyuan YE, Lori WASHINGTON, Xianzhi TAO, Yi-Chiau HUANG, Chen-Ying WU