Patents by Inventor Parameshwar Ananth Kadekodi

Parameshwar Ananth Kadekodi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8892787
    Abstract: Methods and apparatus for packing received Serial Attached SCSI (SAS) frames in buffers for transmission to a host system memory. SAS frames are received from another SAS device and stored in a frame buffer memory. User data in the received frames has appended SCSI Data Integrity Fields (DIF information) to enhance reliability. Features and aspects hereof use the DIF information to validate the user data and then strip the DIF information to densely pack the validated user data in a DMA staging buffer for transmission to a host's system buffer memory using DMA features of the SAS device. The DMA circuit is programmed and started when the staging buffer is filled to at least a threshold amount of data to thereby improve efficacy of the DMA transfer performance. Other criteria may also be employed to determine when to start the DMA circuit.
    Type: Grant
    Filed: March 6, 2012
    Date of Patent: November 18, 2014
    Assignee: LSI Corporation
    Inventors: Brian A. Day, Parameshwar Ananth Kadekodi, Kabra Nitin Satishchandra
  • Publication number: 20140040465
    Abstract: Methods and structures for validating tag information received in SAS frames by any of a plurality of ports comprising a SAS wide port. Each port may have a dedicated transport layer processing element. A tag information table is shared by all of the one or more transport layer processing elements. The tag information table is used to store information regarding a particular tag value being valid for use with a particular device and is updated when the particular tag value is no longer valid for use with the particular device. The information is initially stored in response to transmission of a frame that first uses the particular tag value with the particular device. The tag information table is updated to indicate the particular tag value is no longer valid upon receipt of an appropriate SAS frame or by a processing element external to the one or more transport layer processing elements.
    Type: Application
    Filed: October 11, 2013
    Publication date: February 6, 2014
    Applicant: LSI Corporation
    Inventors: Brian A. Day, Srikiran Dravida, Parameshwar Ananth Kadekodi
  • Patent number: 8612632
    Abstract: Methods and structures for validating tag information received in SAS frames by any of a plurality of ports comprising a SAS wide port. Each port may have a dedicated transport layer processing element. A tag information table is shared by all of the one or more transport layer processing elements. The tag information table is used to store information regarding a particular tag value being valid for use with a particular device and is updated when the particular tag value is no longer valid for use with the particular device. The information is initially stored in response to transmission of a frame that first uses the particular tag value with the particular device. The tag information table is updated to indicate the particular tag value is no longer valid upon receipt of an appropriate SAS frame or by a processing element external to the one or more transport layer processing elements.
    Type: Grant
    Filed: August 18, 2004
    Date of Patent: December 17, 2013
    Assignee: LSI Corporation
    Inventors: Brian A. Day, Srikiran Dravida, Parameshwar Ananth Kadekodi
  • Publication number: 20130238821
    Abstract: Methods and apparatus for packing received Serial Attached SCSI (SAS) frames in buffers for transmission to a host system memory. SAS frames are received from another SAS device and stored in a frame buffer memory. User data in the received frames has appended SCSI Data Integrity Fields (DIF information) to enhance reliability. Features and aspects hereof use the DIF information to validate the user data and then strip the DIF information to densely pack the validated user data in a DMA staging buffer for transmission to a host's system buffer memory using DMA features of the SAS device. The DMA circuit is programmed and started when the staging buffer is filled to at least a threshold amount of data to thereby improve efficacy of the DMA transfer performance. Other criteria may also be employed to determine when to start the DMA circuit.
    Type: Application
    Filed: March 6, 2012
    Publication date: September 12, 2013
    Applicant: LSI CORPORATION
    Inventors: Brian A. Day, Parameshwar Ananth Kadekodi, Kabra Nitin Satishchandra