Patents by Inventor Parikshit S. Gopalan

Parikshit S. Gopalan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180211001
    Abstract: Polynucleotide sequencing generates multiple reads of a polynucleotide molecule. Many or all of the reads may contain errors. Trace reconstruction takes multiple reads generated by a polynucleotide sequencer and uses those multiple reads to reconstruct accurately the nucleotide sequence. The types of errors are substitutions, deletions, and insertions. The location of an error in a read is identified by comparing the sequence of the read to the other reads. The type of error is determined by comparing both the base call of the read at the error location and base calls of the read and other reads in a look-ahead window that includes base calls adjacent to the error location. A consensus output sequence is developed from the sequences of the multiple reads and identification of the error types for errors in the reads.
    Type: Application
    Filed: April 25, 2017
    Publication date: July 26, 2018
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Parikshit S. Gopalan, Sergey Yekhanin, Siena Dumas Ang, Nebojsa Jojic, Miklos Racz, Karen Strauss, Luis Ceze
  • Patent number: 9983959
    Abstract: The techniques and/or systems described herein implement erasure coding to generate various chunks for a data collection (e.g., data chunks and at least one encoding chunk). The chunks are then distributed and stored within an individual group (e.g., a pod) of storage units, where a pod of storage units is determined based on characteristics that affect an amount of time it takes to recover a data collection or to restore lost data.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: May 29, 2018
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Robert John Jenkins, Jr., Parikshit S Gopalan, Cheng Huang, Edmund Bernard Nightingale, Alexander Shamis, Sergey Yekhanin
  • Patent number: 9875810
    Abstract: A memory region can durably self-identify as being faulty when read. Information that would have been assigned to the faulty memory region can be assigned to another of that sized region in memory using a replacement encoding technique. For phase change memory, at least two fault states can be provided for durably self-identifying a faulty memory region; one state at a highest resistance range and the other state at a lowest resistance range. Replacement cells can be used to shift or assign data when a self-identifying memory fault is present. A memory controller and memory module, alone or in combination may manage replacement cell use and facilitate driving a newly discovered faulty cell to a fault state if the faulty cell is not already at the fault state.
    Type: Grant
    Filed: July 24, 2013
    Date of Patent: January 23, 2018
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: John D. Davis, Karin Strauss, Mark Steven Manasse, Parikshit S. Gopalan, Sergey Yekhanin
  • Patent number: 9600365
    Abstract: In some examples, an erasure code can be implemented to provide for fault-tolerant storage of data. Maximally recoverable cloud codes, resilient cloud codes, and robust product codes are examples of different erasure codes that can be implemented to encode and store data. Implementing different erasure codes and different parameters within each erasure code can involve trade-offs between reliability, redundancy, and locality. In some examples, an erasure code can specify placement of the encoded data on machines that are organized into racks.
    Type: Grant
    Filed: April 16, 2013
    Date of Patent: March 21, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Dennis Craig Fetterly, Parikshit S Gopalan, Cheng Huang, Robert John Jenkins, Jr., Jin Li, Sergey Yekhanin
  • Publication number: 20160378624
    Abstract: The techniques and/or systems described herein implement erasure coding to generate various chunks for a data collection (e.g., data chunks and at least one encoding chunk). The chunks are then distributed and stored within an individual group (e.g., a pod) of storage units, where a pod of storage units is determined based on characteristics that affect an amount of time it takes to recover a data collection or to restore lost data.
    Type: Application
    Filed: June 29, 2015
    Publication date: December 29, 2016
    Inventors: Robert John Jenkins, Jr., Parikshit S. Gopalan, Cheng Huang, Edmund Bernard Nightingale, Alexander Shamis, Sergey Yekhanin
  • Patent number: 9442799
    Abstract: A memory controller can include an error correction module for extended lifetime memory that tracks at least one sized block of non-fault consecutive bits within the disabled page as spare blocks and reuses the spare blocks from the disabled pages as an error correction resource for active blocks. The active blocks can store data, data and metadata, or metadata only (e.g., error correction metadata). A method for extended lifetime memory can include, for an active block of metadata containing at least one fault, using at least one spare block to correct the data of the active block. For an active block of data containing at least one fault, the data can be initially corrected via XOR correction with a first spare block and then ultimately corrected via XOR correction with a second spare block.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: September 13, 2016
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Mark Steven Manasse, Sergey Yekhanin, Parikshit S. Gopalan, Karin Strauss, John D. Davis
  • Publication number: 20150378821
    Abstract: A memory controller can include an error correction module for extended lifetime memory that tracks at least one sized block of non-fault consecutive bits within the disabled page as spare blocks and reuses the spare blocks from the disabled pages as an error correction resource for active blocks. The active blocks can store data, data and metadata, or metadata only (e.g., error correction metadata). A method for extended lifetime memory can include, for an active block of metadata containing at least one fault, using at least one spare block to correct the data of the active block. For an active block of data containing at least one fault, the data can be initially corrected via XOR correction with a first spare block and then ultimately corrected via XOR correction with a second spare block.
    Type: Application
    Filed: June 26, 2014
    Publication date: December 31, 2015
    Inventors: Mark Steven Manasse, Sergey Yekhanin, Parikshit S. Gopalan, Karin Strauss, John D. Davis
  • Publication number: 20150033064
    Abstract: A memory region can durably self-identify as being faulty when read. Information that would have been assigned to the faulty memory region can be assigned to another of that sized region in memory using a replacement encoding technique. For phase change memory, at least two fault states can be provided for durably self-identifying a faulty memory region; one state at a highest resistance range and the other state at a lowest resistance range. Replacement cells can be used to shift or assign data when a self-identifying memory fault is present. A memory controller and memory module, alone or in combination may manage replacement cell use and facilitate driving a newly discovered faulty cell to a fault state if the faulty cell is not already at the fault state.
    Type: Application
    Filed: July 24, 2013
    Publication date: January 29, 2015
    Applicant: Microsoft Corporation
    Inventors: John D. Davis, Karin Strauss, Mark Steven Manasse, Parikshit S. Gopalan, Sergey Yekhanin
  • Publication number: 20140310571
    Abstract: In some examples, an erasure code can be implemented to provide for fault-tolerant storage of data. Maximally recoverable cloud codes, resilient cloud codes, and robust product codes are examples of different erasure codes that can be implemented to encode and store data. Implementing different erasure codes and different parameters within each erasure code can involve trade-offs between reliability, redundancy, and locality. In some examples, an erasure code can specify placement of the encoded data on machines that are organized into racks.
    Type: Application
    Filed: April 16, 2013
    Publication date: October 16, 2014
    Applicant: Microsoft Corporation
    Inventors: Dennis Craig Fetterly, Parikshit S. Gopalan, Cheng Huang, Robert John Jenkins, JR., Jin Li, Sergey Yekhanin