Abstract: A DevOps virtual assistant platform may analyze a DevOps workflow request received via a collaboration tool to identify one or more tasks, may activate and assign one or more worker bots to the one or more tasks, may verify, based on user credentials of a user associated with the DevOps workflow, that the user is authorized to access one or more backend DevOps tools, may access, via a DevOps orchestration engine, the one or more backend DevOps tools to automatically perform the task using the one or more backend DevOps tools, may determine that the one or more worker bots have completed the one or more tasks, and may provide, based on determining that the one or more worker bots have completed the one or more tasks, an indication via the collaboration tool that the DevOps workflow request has been processed.

Abstract: Disclosed herein are methods of making and using compositions comprising medical devices, particularly medical devices made from resorbable polymers.

Abstract: A biodegradable nasal splint comprising a tubular component at least partially defining a hollow passageway. The tubular component may be formed from a degradable material comprising a copolymer comprising glycolide subunits, trimethyl carbonate subunits, and caprolactone subunits. The degradable material may further comprise from about 0.01% to about 30% chitosan, by weight of the degradable material. The biodegradable nasal splint may further comprise a therapeutic agent such as chitosan applied to one or more surfaces of the nasal splint Also, a biodegradable nasal splint comprising a tubular component at least partially defining a hollow passageway and formed from a degradable material. The degradable material may comprise at least about 95% chitosan, by weight of the degradable material.

Abstract: An integrated circuit can include programmable circuitry configured to implement an overlay circuit specified by an overlay and a processor coupled to the programmable circuitry. The processor can be configured to control the programmable circuitry through execution of a framework. The framework provides high-productivity language control of implementation of the overlay in the programmable circuitry.

Abstract: A DevOps virtual assistant platform may analyze a DevOps workflow request received via a collaboration tool to identify one or more tasks, may activate and assign one or more worker bots to the one or more tasks, may verify, based on user credentials of a user associated with the DevOps workflow, that the user is authorized to access one or more backend DevOps tools, may access, via a DevOps orchestration engine, the one or more backend DevOps tools to automatically perform the task using the one or more backend DevOps tools, may determine that the one or more worker bots have completed the one or more tasks, and may provide, based on determining that the one or more worker bots have completed the one or more tasks, an indication via the collaboration tool that the DevOps workflow request has been processed.

Abstract: A system includes a runtime generator implemented in programmable circuitry of an integrated circuit, wherein the runtime generator is parameterizable at runtime of the integrated circuit to perform at least one of detecting a symbol pattern within a data stream or generating pseudo random number binary sequences. The system can include a processor configured to execute program code, wherein the processor is configured to provide first parameterization data to the runtime generator. In response to receiving the first parameterization data from the processor at runtime of the integrated circuit, the runtime generator implements a first automaton circuit configured to perform the at least one of the detecting the symbol pattern or the generating the pseudo random number binary sequences.

Abstract: An integrated circuit can include programmable circuitry configured to implement an overlay circuit specified by an overlay and a processor coupled to the programmable circuitry. The processor can be configured to control the programmable circuitry through execution of a framework. The framework provides high-productivity language control of implementation of the overlay in the programmable circuitry.

Abstract: An integrated circuit can include programmable circuitry configured to implement an overlay circuit specified by an overlay. The overlay circuit can include a trace buffer configured to receive a probed signal from circuitry within the overlay circuit. The trace buffer can be configured to generate trace data from the probed signal and store the trace data in a runtime allocated memory. The integrated circuit also can include a processor coupled to the programmable circuitry and configured to control operation of the trace buffer. The processor can be configured to read the trace data from the runtime allocated memory.

Abstract: An integrated circuit can include a slave processor configured to execute instructions. The slave processor can be implemented in programmable circuitry of the integrated circuit. The integrated circuit also can include a processor coupled to the slave processor. The processor can be hardwired and configured to control operation of the slave processor.

Abstract: A system can include a finite state machine generator implemented in programmable circuitry of an integrated circuit. The finite state machine generator is parameterizable to implement different finite state machines at runtime of the integrated circuit. The system can include a processor configured to execute program code. The processor is configured to provide first parameterization data to the finite state machine generator at runtime of the integrated circuit. The first parameterization data specifies a first finite state machine and the finite state machine generator implements the first finite state machine in response to receiving the first parameterization data from the processor.

Abstract: An integrated circuit can include a slave processor configured to execute instructions. The slave processor can be implemented in programmable circuitry of the integrated circuit. The integrated circuit also can include a processor coupled to the slave processor. The processor can be hardwired and configured to control operation of the slave processor.

Abstract: A method for configuring programmable logic in an IC to implement instances of a relocatable circuit includes, for each instance, assigning a respective portion of an address space of a processor to the instance, configuring a respective interface circuit for translating the transactions accessing the respective portion of the address space into a fixed address space of the relocatable circuit, and selecting a respective region within an array of programmable logic and interconnect resources of the IC. The processor accesses the address space with read and write transactions issued on an interface bus. The relocatable circuit is independent of the address space assigned to the instances. Each region is configurable to implement an instance. The programmable logic and interconnect resources are configured to implement the instances and to couple each instance to the interface bus of the processor via the respective interface circuit, using a single copy of configuration data for the relocatable circuit.

Abstract: An electrical device is disclosed for use in a wall box having a series of buttons that can either be rocker buttons or push buttons; these buttons can be supported by springboards formed integral with a support board; the springboards are for biasing the series of buttons; much of the device is housed within a housing formed at a first end by a body and a second end by a strap coupled to the housing; the strap extends beyond the body, wherein this strap can be used to dissipate heat from the device; inside of the housing can be at least one circuit board which has switches, which can be used to receive instructions from a plurality of buttons.

Abstract: A self-draining grill and system incorporating the same. The grill includes a plurality of ribs extending from a surface of a housing and angled downward in a direction across the surface of the housing. One or more openings are disposed between the ribs and allow air flow to a sound generation device.

Abstract: A circuit is implemented using a programmable logic device (PLD) that includes an array of programmable logic and routing resources. The circuit includes a processor, a configuration port, a relocatable circuit, and an interface circuit. The processor accesses an address space using read and write transactions issued on an interface bus. The programmable logic and interconnect resources are configurable via the configuration port. The relocatable circuit is implemented in a selected region within the array by configuring the programmable logic and interconnect resources in the selected region with configuration data via the configuration port. The interface circuit translates the transactions accessing a portion of the address space assigned to the relocatable circuit into a fixed address space of the relocatable circuit. The configuration data for implementing the relocatable circuit is independent of the portion of the address space assigned to the relocatable circuit.

Abstract: A remote control electrical device which can communicate with a remote control device. The electrical control device is adapted to fit into a housing which fits into a wall mounting. The remote control electrical device can comprise a control circuit disposed in the housing, a transmitter disposed in the housing, a receiver disposed in the housing wherein said transmitter and said receiver are in communication with the control circuit. There is also a support plate having an inside face facing into the housing and an outside face facing away from the housing body. The support plate is coupled to the housing, wherein there is also an antenna disposed on the outside face of the support plate. This antenna does not receive any power-line AC frequencies or DC, instead it is capacitively coupled to the rest of the electrical components and disposed on the outside face of the support plate.

Abstract: An electrical device is disclosed for use in a wall box having a series of buttons that can either be rocker buttons or push buttons. These buttons can be supported by springboards formed integral with a support board. The springboards are for biasing the series of buttons. Much of the device is housed within a housing formed at a first end by a body and a second end by a strap coupled to the housing. The strap extends beyond the body, wherein this strap can be used to dissipate heat from the device. Inside of the housing can be at least one circuit board which has switches, which can be used to receive instructions from a plurality of buttons. In one embodiment, a plurality of light pipes are adapted so that they are housed at least partially inside of these buttons. At least one portion of the light pipe can be formed as a shaft and adapted to extend out from this housing and down to a light emitter disposed on the circuit board.

Abstract: An aspect of the present invention is a voltage controlled oscillator that provides multi octave band tenability. The oscillator preferably includes one or more multi planar resonators which allow it to be implemented in integrated circuit form. Oscillators implemented in accordance with the aspect of the present invention provide as wide a tuning range as the YIG based resonators but are much more compact and efficient. Therefore, they are amenable to implementation in integrated circuits and suited for adaptation in third and future generation wireless devices.

Abstract: A self-draining grill and system incorporating the same. The grill includes a plurality of ribs extending from a surface of a housing and angled downward in a direction across the surface of the housing. One or more openings are disposed between the ribs and allow air flow to a sound generation device.

Abstract: A tunable oscillator includes a first transistor, a second transistor connected in parallel with the first transistor, a noise feedback and bias network coupled to the first and second transistors, a planar coupled resonator network coupled to the transistors and a means for dynamically tuning the resonant frequency of the planar coupled network and the junction capacitance of the transistors.