Patents by Inventor Parimal Kulkarni

Parimal Kulkarni has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • MIB data broadcast using inexpensive method incorporating microcontroller and FPGA
    Patent number: 10574727
    Abstract: An apparatus includes a microcontroller (404) configured to read from a Management Information Base (MIB) register (410) of an Ethernet switch (402) to obtain MIB statistic data (412) regarding a first Ethernet port of the Ethernet switch. The microcontroller is configured to transmit the obtained MIB statistic data to a field programmable gate array (FPGA) (406). The FPGA is configured to receive and store the obtained MIB statistic data in a buffer memory (418). The FPGA is configured to encapsulate the obtained MIB statistic data in an Ethernet frame (426). The FPGA is configured to determine a vacant time slot during which the Ethernet switch is not transmitting data to an external device (524). The FPGA is configured to transmit the Ethernet frame to the external device during the vacant time slot.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: February 25, 2020
    Assignee: Honeywell International Inc.
    Inventors: Amit Kulkarni, Sameer D. Manikfan, Raja Sekhar Chanapathi, Parimal Kulkarni
  • MIB DATA BROADCAST USING INEXPENSIVE METHOD INCORPORATING MICROCONTROLLER AND FPGA
    Publication number: 20170118270
    Abstract: An apparatus includes a microcontroller (404) configured to read from a Management Information Base (MIB) register (410) of an Ethernet switch (402) to obtain MIB statistic data (412) regarding a first Ethernet port of the Ethernet switch. The microcontroller is configured to transmit the obtained MIB statistic data to a field programmable gate array (FPGA) (406). The FPGA is configured to receive and store the obtained MIB statistic data in a buffer memory (418). The FPGA is configured to encapsulate the obtained MIB statistic data in an Ethernet frame (426). The FPGA is configured to determine a vacant time slot during which the Ethernet switch is not transmitting data to an external device (524). The FPGA is configured to transmit the Ethernet frame to the external device during the vacant time slot.
    Type: Application
    Filed: October 21, 2015
    Publication date: April 27, 2017
    Inventors: Amit Kulkarni, Sameer D. Manikfan, Raja Sekhar Chanapathi, Parimal Kulkarni