Patents by Inventor Parineeth M. Reddy

Parineeth M. Reddy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8909857
    Abstract: Incoming data packets are often processed according to their origination or destination port. In order to efficiently determine applicable rules based on port values, ranges are stored in association with corresponding rules in a ternary memory. In order to reduce the amount of required memory to store these ranges, extra unused bits of the ACL that includes the rule can be used. Further, to maximize the storage capability of these limited extra bits, most common ranges can be stored in one or more bit partitions depending on whether they encompass other most common ranges to be stored in the extra bits. Through partitioning and intelligent bit assignment, many ranges can be stored in the limited extra bits, and can each remain individually addressable.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: December 9, 2014
    Assignee: Broadcom Corporation
    Inventor: Parineeth M. Reddy
  • Publication number: 20140006535
    Abstract: Incoming data packets are often processed according to their origination or destination port. In order to efficiently determine applicable rules based on port values, ranges are stored in association with corresponding rules in a ternary memory. In order to reduce the amount of required memory to store these ranges, extra unused bits of the ACL that includes the rule can be used. Further, to maximize the storage capability of these limited extra bits, most common ranges can be stored in one or more bit partitions depending on whether they encompass other most common ranges to be stored in the extra bits. Through partitioning and intelligent bit assignment, many ranges can be stored in the limited extra bits, and can each remain individually addressable.
    Type: Application
    Filed: June 29, 2012
    Publication date: January 2, 2014
    Applicant: Broadcom Corporation
    Inventor: Parineeth M. REDDY
  • Patent number: 8438330
    Abstract: A method and apparatus for ordering a plurality (P) of entries having various prefix lengths for storage in a number (T) of available storage locations in a content addressable memory (CAM) array according to the prefix lengths is disclosed. Initially, a first number (N) of the entries of selected and used to generate a distribution graph of their prefix lengths. Then, for each unique prefix length, a corresponding subset of the T storage locations in the CAM array are allocated according to a predicted prefix length distribution indicated by the distribution graph. Then, all of the entries are stored in the corresponding allocated storage locations according to prefix length.
    Type: Grant
    Filed: March 18, 2011
    Date of Patent: May 7, 2013
    Assignee: Netlogic Microsystems, Inc.
    Inventor: Parineeth M. Reddy
  • Publication number: 20110283061
    Abstract: A method and apparatus for ordering a plurality (P) of entries having various prefix lengths for storage in a number (T) of available storage locations in a content addressable memory (CAM) array according to the prefix lengths is disclosed. Initially, a first number (N) of the entries of selected and used to generate a distribution graph of their prefix lengths. Then, for each unique prefix length, a corresponding subset of the T storage locations in the CAM array are allocated according to a predicted prefix length distribution indicated by the distribution graph. Then, all of the entries are stored in the corresponding allocated storage locations according to prefix length.
    Type: Application
    Filed: March 18, 2011
    Publication date: November 17, 2011
    Inventor: Parineeth M. Reddy