Abstract: Embodiments relate to a system for translating design specifications of an electronic circuit. In one embodiment, the design specification is parsed to identify one or more sentences. From the one or more identified sentences, the system extracts semantic concepts. Additionally, for each sentence of the one or more identified sentences, the system determines whether the sentence is translatable. If a target sentence is translatable, the system generates a parse tree for the target sentence, and generates a probabilistic shift-reduce schedule for the generated parse tree. Using the generated probabilistic shift-reduce schedule and optionally the generated parse tree, the system generates code for verifying the condition specified in the target sentence. In some embodiments, to generate the code, the system parses the target sentence using the generated probabilistic shift-reduce schedule.

Abstract: Systems and methods to receive a computing job from an Electronic Design Automation (EDA) software application, and dynamically determine at least one precedence or successor job constraint for the received computing job, are described herein. Further, an edge inference algorithm is used to determine edges of a Dynamic Acyclic Graph (DAG) representing the EDA software application computing jobs, along with jobs that are dependent on the received computing job. In this way, job dependencies are discovered and scheduled dynamically, reducing turnaround time, and increasing efficiency of computing resources.

Abstract: Embodiments relate to a system for translating design specifications of an electronic circuit. In one embodiment, the design specification is parsed to identify one or more sentences. From the one or more identified sentences, the system extracts semantic concepts. Additionally, for each sentence of the one or more identified sentences, the system determines whether the sentence is translatable. If a target sentence is translatable, the system generates a parse tree for the target sentence, and generates a probabilistic shift-reduce schedule for the generated parse tree. Using the generated probabilistic shift-reduce schedule and optionally the generated parse tree, the system generates code for verifying the condition specified in the target sentence. In some embodiments, to generate the code, the system parses the target sentence using the generated probabilistic shift-reduce schedule.

Abstract: Optimizing ML models for resource constraints in electronic design automation (EDA) computer aided design (CAD) flows, including computing a set of bin thresholds based on slope changes in an ordered set of discrete probabilistic classification scores, assigning the discrete probabilistic classification scores to the bins based on the values of the discrete probabilistic classification scores and the bin thresholds, and selecting processes associated with the discrete probabilistic classification scores of one or more of the bins based on costs of the respective processes and a global budget.

Abstract: Embodiments relate to a system for translating design specifications of an electronic circuit. In one embodiment, the design specification is parsed to identify one or more sentences. From the one or more identified sentences, the system extracts semantic concepts. Additionally, for each sentence of the one or more identified sentences, the system determines whether the sentence is translatable. If a target sentence is translatable, the system generates a parse tree for the target sentence, and generates a probabilistic shift-reduce schedule for the generated parse tree. Using the generated probabilistic shift-reduce schedule and optionally the generated parse tree, the system generates code for verifying the condition specified in the target sentence. In some embodiments, to generate the code, the system parses the target sentence using the generated probabilistic shift-reduce schedule.