Patents by Inventor Parmeshwr Prasad
Parmeshwr Prasad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10466919Abstract: An information handling system includes multiple flash dual in-line memory modules (DIMMs) including first, second, and third flash DIMMs. The first and second flash DIMMs are configured as a first interleave set. A BIOS detects the third flash DIMM as a new flash DIMM during an initialization of the information handling system, and detects whether an auto-configure attribute is enabled. In response to the auto-configure attribute being enabled, the BIOS reads persistent memory data from the first interleave set, configures a second interleave set including the first, second, and third flash DIMMs, transfers the persistent memory data to the second interleave set without an external memory being utilized, and updates metadata for the second interleave set in response to the persistent memory data being transferred successfully.Type: GrantFiled: March 20, 2018Date of Patent: November 5, 2019Assignee: Dell Products, LPInventors: Parmeshwr Prasad, Viswanath Ponnuru, Ravishankar Kanakapura Nanjundaswamy
-
Publication number: 20190332527Abstract: An information handling system includes flash dual in-line memory modules, a central processing unit, and a memory controller. The memory controller detects that a value is written to a first flush hint register of a table. The first flush hint register is associated with a first flash pool of the flash dual in-line memory modules. The memory controller detects that a value is written to a second flush hint register of the table. The second flush hint register is associated with a second flash pool of the flash dual in-line memory modules. The memory controller flushes first data for the first flash pool and second data for the second flash pool in the cache to flash dual in-line memory modules in order of priority based on a first priority of the first pool and a second priority of the second pool.Type: ApplicationFiled: April 25, 2018Publication date: October 31, 2019Inventors: Viswanath Ponnuru, Ravishankar Kanakapura Nanjundaswamy, Parmeshwr Prasad
-
Publication number: 20190332262Abstract: An information handling system includes a management interface that may detect a configuration change request for the flash dual in-line memory modules, and may determine whether the configuration change request is a hardware configuration change or a software configuration change. In response to the configuration change request being the software configuration change the management interface may re-configure flash dual in-line memory modules based on a first profile identified by the configuration change request without resetting the information handling system, update metadata for the flash dual in-line memory modules based on the first profile without resetting the information handling system, and update a dual in-line memory module firmware interface table for the flash dual in-line memory modules based on the first profile without resetting the information handling system.Type: ApplicationFiled: April 25, 2018Publication date: October 31, 2019Inventors: Parmeshwr Prasad, Viswanath Ponnuru, Ravishankar Kanakapura Nanjundaswamy
-
Publication number: 20190294352Abstract: An information handling system includes multiple flash dual in-line memory modules (DIMMs) including first, second, and third flash DIMMs. The first and second flash DIMMs are configured as a first interleave set. A BIOS detects the third flash DIMM as a new flash DIMM during an initialization of the information handling system, and detects whether an auto-configure attribute is enabled. In response to the auto-configure attribute being enabled, the BIOS reads persistent memory data from the first interleave set, configures a second interleave set including the first, second, and third flash DIMMs, transfers the persistent memory data to the second interleave set without an external memory being utilized, and updates metadata for the second interleave set in response to the persistent memory data being transferred successfully.Type: ApplicationFiled: March 20, 2018Publication date: September 26, 2019Inventors: Parmeshwr Prasad, Viswanath Ponnuru, Ravishankar Kanakapura Nanjundaswamy
-
Publication number: 20190266053Abstract: An information handling system includes a non-volatile memory, a central processing unit, and a memory controller. The non-volatile memory is configured in a block translation table mode, and divided into a plurality of sectors. The central processing unit writes data to the non-volatile memory by sector. The memory controller detects a power loss in the information handling system, determines a memory address of a last successful write within the non-volatile memory, stores the memory address in an used portion of the non-volatile memory, and starts a save operation.Type: ApplicationFiled: February 28, 2018Publication date: August 29, 2019Inventors: Parmeshwr Prasad, Viswanath Ponnuru, Ravishankar Kanakapura Nanjundaswamy
-
Systems and methods for prognosticating likelihood of successful save operation in persistent memory
Patent number: 10387306Abstract: In accordance with embodiments of the present disclosure, an information handling system may include a processor, a prognostic agent embodied in a program of executable instructions and configured to, when executed, maintain a prognostic data structure setting forth a plurality of parameters regarding a non-volatile memory of the information handling system, and a memory controller configured. The memory controller may be configured to calculate a severity index based on the parameters set forth in the prognostic data structure, the severity index indicative of a likelihood of successfully completing a save operation to the non-volatile memory from a volatile memory in response to a power event of the information handling system and based on the severity index, determine whether or not to perform a save operating in response to a power event of the information handling system.Type: GrantFiled: June 30, 2017Date of Patent: August 20, 2019Assignee: Dell Products L.P.Inventors: Parmeshwr Prasad, Yogesh P. Kulkarni -
Patent number: 10346321Abstract: A management controller includes a microcontroller and a managed system interface for coupling the management controller to a managed system. The managed system includes a central processing unit (CPU) and a system memory comprised of non-volatile dual in-line memory module (NVDIMM). The management controller is coupled to a management network by an out-of-band interface. The management controller provides a remote management user interface that includes a selectable out-of-band NVDIMM save element. The management controller may establish a connection with an operating system agent and control the agent to perform operations including accessing a memory map to identify an NVDIMM, configuring the NVDIMM in an asynchronous DRAM refresh mode, and triggering an NVDIMM save before toggling CPU reset.Type: GrantFiled: May 4, 2017Date of Patent: July 9, 2019Assignee: Dell Products L.P.Inventors: Parmeshwr Prasad, Shinose Abdul Rahiman
-
Publication number: 20190208023Abstract: An information handling system may include at least one processor and a network interface controller communicatively coupled thereto. The network interface controller may be configured to provide network communication between the information handling system and a remote information handling system according to a Server Message Block (SMB) protocol. The information handling system may further be configured to establish a communication session with the remote information handling system according to a first SMB channel having a first bandwidth, and in response to an indication from the remote information handling system, transition the communication session to a second, different SMB channel having a second bandwidth greater than the first bandwidth.Type: ApplicationFiled: December 28, 2017Publication date: July 4, 2019Applicant: Dell Products L.P.Inventors: Shekar Babu SURYANARAYANA, Sumanth VIDYADHARA, Parmeshwr PRASAD
-
Publication number: 20190188020Abstract: In accordance with embodiments of the present disclosure, an information handling system may include a memory subsystem and a processor subsystem communicatively coupled to the memory subsystem and configured to execute a hypervisor, wherein the hypervisor is configured to host a plurality of virtual machines and host an interface to the memory subsystem, wherein the interface is configured to maintain a data structure for mapping at least one namespace instantiated within the memory subsystem to a plurality of access modes for accessing the at least one namespace from the processor subsystem.Type: ApplicationFiled: December 19, 2017Publication date: June 20, 2019Applicant: Dell Products L.P.Inventors: Viswanath PONNURU, K. N. RAVISHANKAR, Parmeshwr PRASAD, Shekar Babu SURYANARAYANA
-
Publication number: 20190188589Abstract: In accordance with embodiments of the present disclosure, an information handling system may include a processor, a memory system communicatively coupled to the processor, the memory system comprising one or more persistent memory modules, each of the one or more persistent memory modules comprising a volatile memory and a non-volatile memory, and a management controller communicatively coupled to the processor and the memory system. The management controller may be configured to correlate temperature sensor information with one or more other operational parameters associated with the one or more persistent memory modules and predict a likelihood of degradation of the one or more persistent memory modules based on correlation of the temperature sensor information with the one or more other operational parameters.Type: ApplicationFiled: December 15, 2017Publication date: June 20, 2019Applicant: Dell Products L.P.Inventors: Viswanath PONNURU, K. N. RAVISHANKAR, Parmeshwr PRASAD
-
Publication number: 20190171580Abstract: A virtual memory system includes a virtual memory engine coupled to a plurality of physical memory devices and a virtual memory database. During an initialization process, virtual memory engine uses a first unique global identifier to create virtual memory in the virtual memory database by mapping a continuous virtual memory address range to non-continuous physical memory device address ranges that are provided across the plurality of physical memory devices. During the initialization process, or subsequently during runtime, the virtual memory engine uses a second global unique identifier to define a virtual memory device namespace in the virtual memory that includes a first continuous subset of the continuous virtual member address range. During runtime, the virtual memory engine then provides read and write block mode access to the plurality of physical memory devices via the virtual memory device namespace defined in the virtual memory database.Type: ApplicationFiled: December 6, 2017Publication date: June 6, 2019Inventors: Shekar Babu Suryanarayana, Sumanth Vidyadhara, Parmeshwr Prasad
-
Patent number: 10303487Abstract: A method, information handling system (IHS) and sub-system for enabling booting of the IHS using different operating system configurations. The method includes retrieving, via a processor, a unified extensible firmware interface (UEFI) image from a storage device and initializing at least one UEFI runtime service. The processor determines if a memory map corresponding to the UEFI runtime service defines multiple memory descriptors. In response to determining that the memory map defines multiple memory descriptors, a common memory descriptor is identified. The UEFI runtime service and the corresponding memory map are aligned to the common memory descriptor. The aligned UEFI runtime service and the corresponding memory map are copied to a system memory of the IHS. The operating system is booted, wherein the aligned UEFI runtime service and the corresponding memory map are compatible with operating systems that support single runtime memory descriptors.Type: GrantFiled: May 18, 2016Date of Patent: May 28, 2019Assignee: Dell Products, L.P.Inventors: Sumanth Vidyadhara, Parmeshwr Prasad, Vijay Bharat Nijhawan
-
Publication number: 20190095114Abstract: In accordance with embodiments of the present disclosure, an information handling system may include a processor, a memory communicatively coupled to the processor, and an allocation agent embodied in a program of executable instructions and configured to, when executed by the processor, maintain an attribute index setting forth one or more attributes for each of one or more memory modules of the memory, and based on the one or more attributes and one or more memory requirements of an application executing on the information handling system, dynamically allocate the one or more memory modules to a namespace associated with the application.Type: ApplicationFiled: September 22, 2017Publication date: March 28, 2019Applicant: Dell Products L.P.Inventors: Parmeshwr PRASAD, Yogesh P. KULKARNI
-
Patent number: 10176030Abstract: An Information Handling System (IHS) includes one or more persistent memory devices coupled to a processor and system memory. During runtime, a namespace correction agent monitors the persistent modules whose full physical address space are configured as block mode and/or interleave set namespace. The namespace correction agent identifies an incomplete namespace trigger that is detected by a driver and caused by one of a faulty or missing persistent memory module. In response to identifying the incomplete namespace trigger, the namespace correction agent: access memory details identifying a corresponding faulty or missing persistent module to determine a physical label address corresponding to the incomplete namespace; corrects the physical label address corresponding to the incomplete namespace; and reenumerates the relabeled memory.Type: GrantFiled: May 15, 2017Date of Patent: January 8, 2019Assignee: Dell Products, L.P.Inventors: Parmeshwr Prasad, Binoy S. Thomas
-
SYSTEMS AND METHODS FOR PROGNOSTICATING LIKELIHOOD OF SUCCESSFUL SAVE OPERATION IN PERSISTENT MEMORY
Publication number: 20190004948Abstract: In accordance with embodiments of the present disclosure, an information handling system may include a processor, a prognostic agent embodied in a program of executable instructions and configured to, when executed, maintain a prognostic data structure setting forth a plurality of parameters regarding a non-volatile memory of the information handling system, and a memory controller configured. The memory controller may be configured to calculate a severity index based on the parameters set forth in the prognostic data structure, the severity index indicative of a likelihood of successfully completing a save operation to the non-volatile memory from a volatile memory in response to a power event of the information handling system and based on the severity index, determine whether or not to perform a save operating in response to a power event of the information handling system.Type: ApplicationFiled: June 30, 2017Publication date: January 3, 2019Applicant: Dell Products L.P.Inventors: Parmeshwr PRASAD, Yogesh P. KULKARNI -
Publication number: 20180329790Abstract: An Information Handling System (IHS) includes one or more persistent memory devices coupled to a processor and system memory. During runtime, a namespace correction agent monitors the persistent modules whose full physical address space are configured as block mode and/or interleave set namespace. The namespace correction agent identifies an incomplete namespace trigger that is detected by a driver and caused by one of a faulty or missing persistent memory module. In response to identifying the incomplete namespace trigger, the namespace correction agent: access memory details identifying a corresponding faulty or missing persistent module to determine a physical label address corresponding to the incomplete namespace; corrects the physical label address corresponding to the incomplete namespace; and reenumerates the relabeled memory.Type: ApplicationFiled: May 15, 2017Publication date: November 15, 2018Inventors: PARMESHWR PRASAD, BINOY S. THOMAS
-
Publication number: 20180322076Abstract: A management controller includes a microcontroller and a managed system interface for coupling the management controller to a managed system that includes a central processing unit (CPU) and a system memory, accessible to the CPU, including a non-volatile dual in-line memory module (NVDIMM). The management controller may further include an out-of-band interface configured to couple the management controller to a management network. The management controller may include management controller instructions for providing a remote management user interface, including a selectable COB NVDIMM save element. The management controller may perform operations that include establishing a connection with an operating system (OS) agent and controlling the OS agent to perform OS agent operations. The OA agent operations may include accessing a memory map to identify an NVDIMM, configuring the NVDIMM in an asynchronous DRAM refresh (ADR) mode, and triggering an NVDIMM save, e.g., via IPMI command, before toggling CPU reset.Type: ApplicationFiled: May 4, 2017Publication date: November 8, 2018Applicant: Dell Products L.P.Inventors: Parmeshwr PRASAD, Shinose Abdul RAHIMAN
-
Patent number: 10019253Abstract: Systems and methods are provided for updating hot-pluggable devices of an information handling system using dynamic EFI System Resource Table (ESRT) entries to implement an ESRT entry update procedure for hot-pluggable devices. Extended configuration space (e.g., such as PCIe Extended Config Space) of a hot-pluggable device may be utilized to store firmware update version information such as firmware version details, which is used in the OS space to update the ESRT table, and the system OS may read and apply the updated firmware version information and apply the firmware update immediately without additional OS reboots.Type: GrantFiled: February 19, 2016Date of Patent: July 10, 2018Assignee: Dell Products L.P.Inventors: Sumanth Vidyadhara, Parmeshwr Prasad, Srinivas G. Gowda, Raghavendra Venkataramudu
-
Publication number: 20170337064Abstract: A method, information handling system (IHS) and sub-system for enabling booting of the IHS using different operating system configurations. The method includes retrieving, via a processor, a unified extensible firmware interface (UEFI) image from a storage device and initializing at least one UEFI runtime service. The processor determines if a memory map corresponding to the UEFI runtime service defines multiple memory descriptors. In response to determining that the memory map defines multiple memory descriptors, a common memory descriptor is identified. The UEFI runtime service and the corresponding memory map are aligned to the common memory descriptor. The aligned UEFI runtime service and the corresponding memory map are copied to a system memory of the IHS. The operating system is booted, wherein the aligned UEFI runtime service and the corresponding memory map are compatible with operating systems that support single runtime memory descriptors.Type: ApplicationFiled: May 18, 2016Publication date: November 23, 2017Inventors: SUMANTH VIDYADHARA, PARMESHWR PRASAD, VIJAY BHARAT NIJHAWAN
-
Patent number: 9785446Abstract: Methods and systems for efficient boot from a connected device are described. In an embodiment, a method for efficient boot from a connected device may include initializing a base processor device for boot and configuration of an information handling system from a connected device. The method may also include initializing at least one secondary processor for parallel processing of one or more initialization functions. Additionally, the method may include offloading one or more initialization functions to the one or more secondary processors in response to a predetermined trigger event.Type: GrantFiled: December 10, 2014Date of Patent: October 10, 2017Assignee: Dell Products L.P.Inventors: Parmeshwr Prasad, Gobind Vijayakumar, Ashish Bunkar