Patents by Inventor Partha P. Data Ray

Partha P. Data Ray has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Virtual tree-based netlist model and method of delay estimation for an integrated circuit design
    Patent number: 6643832
    Abstract: A pre-placement delay model for a logical function block of an integrated circuit design includes a fan-in count variable, a fan-out count variable and a delay variable. The fan-in count variable has a value indicative of a number of inputs to the logical function block. The fan-out count variable has a value indicative of the number of inputs of other logical function blocks that are driven by an output of the logical function block. The delay variable has a value that is a function of the binary logarithm of the fan-in count variable and the binary logarithm of the fan-out count variable.
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: November 4, 2003
    Assignee: LSI Logic Corporation
    Inventors: Partha P. Data Ray, Mikhail I. Grinchuk, Pedja Raspopovic