Patents by Inventor Parvez DARUWALLA

Parvez DARUWALLA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12341543
    Abstract: Methods and devices to support multiple frequency bands in radio frequency (RF) circuits are shown. The described methods and devices are based on adjusting the effective width of a transistor in such circuits by selectively disposing matching transistors in parallel with the transistor. The presented devices and methods can be used in RF circuits including low noise amplifiers (LNAs), RF receiver front-ends or any other RF circuits where input matching to wideband inputs is required.
    Type: Grant
    Filed: April 3, 2024
    Date of Patent: June 24, 2025
    Assignee: pSemi Corporation
    Inventors: Parvez Daruwalla, Rong Jiang, Sung Kyu Han, Khushali Shah
  • Publication number: 20250132756
    Abstract: Methods and devices to reduce the switching time of radio frequency (RF) switches including antenna switches are disclosed. The disclosed teachings include selective bypassing of the capacitive and resistive elements of the circuit during the transition of RF switches from one state to another. Several implementations of the disclosed methods and devices are also presented.
    Type: Application
    Filed: November 29, 2024
    Publication date: April 24, 2025
    Inventors: Joseph Porter SLATON, Parvez DARUWALLA
  • Publication number: 20250007502
    Abstract: Ground impedance may have adverse effects on the performance of RF circuits that employ shunt switches. The disclosed methods and devices address this issue. The methods and devices involve the use of resonance-canceling inductors to counteract the capacitive reactance caused by parasitic capacitances and/or decoupling capacitors utilized in such systems. Solutions that incorporate series resistors to distribute the resonance across the frequency band of operation are also described. Additionally, devices that employ digitally tuned capacitors to shift the resonance frequency outside the operational band are presented.
    Type: Application
    Filed: June 28, 2023
    Publication date: January 2, 2025
    Inventors: Joseph Porter SLATON, Parvez DARUWALLA
  • Publication number: 20240396503
    Abstract: Methods and circuital arrangements for turning OFF branches of a multi-branch cascode amplifier are presented. First and second switching arrangements coupled to a branch allow turning OFF the branch while protecting transistors of the branch from a supply voltage that may be greater than a tolerable voltage of the transistors. The first switching arrangement includes a transistor-based switch that is in series connection with the transistors of the branch. The first switching arrangement drops the supply voltage during the OFF state of the branch and provides a conduction path for a current through the branch during the ON state of the branch. A resistor and a shunting switch are coupled to a gate of the transistor-based switch to reduce parasitic coupling effects of the transistor-based switch upon an RF signal coupled to the branch during the ON state and OFF state of the branch.
    Type: Application
    Filed: July 31, 2024
    Publication date: November 28, 2024
    Inventors: Miles SANNER, Emre AYRANCI, Parvez DARUWALLA
  • Publication number: 20240372513
    Abstract: Methods and devices to support multiple gain states in amplifiers are described. The methods and devices are based on implementing a feedback element in the amplifier and adjusting the impedance of the feedback element to provide a desired gain while maintaining the overall performance of the amplifier and reducing degradation of the S12 parameter. The feedback element includes an adjustable attenuator and a tunable resistive element. The adjustable attenuator is provided in a path that is common to the feedback path and the bypass path of the amplifier. Exemplary implementations of adjustable attenuators are also presented.
    Type: Application
    Filed: July 12, 2024
    Publication date: November 7, 2024
    Inventors: Rong JIANG, Parvez DARUWALLA, Khushali SHAH
  • Patent number: 12101065
    Abstract: Methods and circuital arrangements for turning OFF branches of a multi-branch cascode amplifier are presented. First and second switching arrangements coupled to a branch allow turning OFF the branch while protecting transistors of the branch from a supply voltage that may be greater than a tolerable voltage of the transistors. The first switching arrangement includes a transistor-based switch that is in series connection with the transistors of the branch. The first switching arrangement drops the supply voltage during the OFF state of the branch and provides a conduction path for a current through the branch during the ON state of the branch. A resistor and a shunting switch are coupled to a gate of the transistor-based switch to reduce parasitic coupling effects of the transistor-based switch upon an RF signal coupled to the branch during the ON state and OFF state of the branch.
    Type: Grant
    Filed: October 23, 2023
    Date of Patent: September 24, 2024
    Assignee: pSemi Corporation
    Inventors: Miles Sanner, Emre Ayranci, Parvez Daruwalla
  • Patent number: 12063016
    Abstract: Methods and devices to support multiple gain states in amplifiers are described. The methods and devices are based on implementing a feedback element in the amplifier and adjusting the impedance of the feedback element to provide a desired gain while maintaining the overall performance of the amplifier and reducing degradation of the S12 parameter. The feedback element includes an adjustable attenuator and a tunable resistive element. The adjustable attenuator is provided in a path that is common to the feedback path and the bypass path of the amplifier. Exemplary implementations of adjustable attenuators are also presented.
    Type: Grant
    Filed: September 23, 2021
    Date of Patent: August 13, 2024
    Assignee: pSemi Corporation
    Inventors: Rong Jiang, Parvez Daruwalla, Khushali Shah
  • Publication number: 20240250702
    Abstract: Methods and devices to support multiple frequency bands in radio frequency (RF) circuits are shown. The described methods and devices are based on adjusting the effective width of a transistor in such circuits by selectively disposing matching transistors in parallel with the transistor. The presented devices and methods can be used in RF circuits including low noise amplifiers (LNAs), RF receiver front-ends or any other RF circuits where input matching to wideband inputs is required.
    Type: Application
    Filed: April 3, 2024
    Publication date: July 25, 2024
    Inventors: Parvez DARUWALLA, Rong JIANG, Sung Kyu HAN, Khushali SHAH
  • Publication number: 20240243738
    Abstract: Programmable clamping methods and devices providing adjustable clamping powers to accommodate different applications and requirements are disclosed. The described devices can use switchable clamping circuits having different structures, body-controlled clamping circuits, or clamping circuits adjusting their input power levels using programmable resistive ladders. Examples of how the disclosed devices can be combined to improve design flexibility are also provided.
    Type: Application
    Filed: November 13, 2023
    Publication date: July 18, 2024
    Inventors: Parvez DARUWALLA, Khushali SHAH
  • Publication number: 20240235596
    Abstract: Methods and devices for limiting the power level of low noise amplifiers (LNA) implemented in radio frequency (RF) receiver front-ends. The described methods are applicable to bypass, low and high gain modes of the LNA. According to the described methods, the decoder allows the signal to be clamped before or after being attenuated. The benefit of such methods is to improve large signal performances (e.g. IIP3, P1dB) of the RF receiver front-end, while still meeting the clamping requirements, or improve (lower) clamped output power, while still meeting large signal performances (e.g. IIP3, P1dB).
    Type: Application
    Filed: October 31, 2023
    Publication date: July 11, 2024
    Inventors: Parvez DARUWALLA, Sung Kyu HAN
  • Publication number: 20240137059
    Abstract: Methods and devices for limiting the power level of low noise amplifiers (LNA) implemented in radio frequency (RF) receiver front-ends. The described methods are applicable to bypass, low and high gain modes of the LNA. According to the described methods, the decoder allows the signal to be clamped before or after being attenuated. The benefit of such methods is to improve large signal performances (e.g. IIP3, P1dB) of the RF receiver front-end, while still meeting the clamping requirements, or improve (lower) clamped output power, while still meeting large signal performances (e.g. IIP3, P1dB).
    Type: Application
    Filed: October 30, 2023
    Publication date: April 25, 2024
    Inventors: Parvez DARUWALLA, Sung Kyu HAN
  • Publication number: 20240113734
    Abstract: Methods and devices to control radiated spurious emission (RSE) in an RF antenna switch are presented. The RF antenna switch includes a through stack that includes at least one regular N-type FET transistor and a plurality of intrinsic N-type FET transistors, and a shunt stack that includes a plurality of intrinsic N-type FET transistors. During an inactive mode of operation, the regular transistor turns OFF to present a high impedance. The RF antenna switch includes a termination stack having a plurality of regular P-type FET transistors that are activated during the inactive mode to present a termination impedance to the antenna. A bias signal generator that remains partially active during the inactive mode of operation to generate positive and negative control voltages having magnitudes that are sufficiently high to maintain ON/OFF control of the transistors of the stacks.
    Type: Application
    Filed: September 28, 2023
    Publication date: April 4, 2024
    Inventor: Parvez DARUWALLA
  • Publication number: 20240113665
    Abstract: Methods and circuital arrangements for turning OFF branches of a multi-branch cascode amplifier are presented. First and second switching arrangements coupled to a branch allow turning OFF the branch while protecting transistors of the branch from a supply voltage that may be greater than a tolerable voltage of the transistors. The first switching arrangement includes a transistor-based switch that is in series connection with the transistors of the branch. The first switching arrangement drops the supply voltage during the OFF state of the branch and provides a conduction path for a current through the branch during the ON state of the branch. A resistor and a shunting switch are coupled to a gate of the transistor-based switch to reduce parasitic coupling effects of the transistor-based switch upon an RF signal coupled to the branch during the ON state and OFF state of the branch.
    Type: Application
    Filed: October 23, 2023
    Publication date: April 4, 2024
    Inventors: Miles SANNER, Emre AYRANCI, Parvez DARUWALLA
  • Patent number: 11855640
    Abstract: Programmable clamping methods and devices providing adjustable clamping powers to accommodate different applications and requirements are disclosed. The described devices can use switchable clamping circuits having different structures, body-controlled clamping circuits, or clamping circuits adjusting their input power levels using programmable resistive ladders. Examples of how the disclosed devices can be combined to improve design flexibility are also provided.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: December 26, 2023
    Assignee: PSEMI CORPORATION
    Inventors: Parvez Daruwalla, Khushali Shah
  • Patent number: 11848666
    Abstract: Methods and devices to reduce the switching time of radio frequency (RF) switches including antenna switches are disclosed. The disclosed teachings include selective bypassing of the capacitive and resistive elements of the circuit during the transition of RF switches from one state to another. Several implementations of the disclosed methods and devices are also presented.
    Type: Grant
    Filed: June 3, 2022
    Date of Patent: December 19, 2023
    Assignee: pSemi Corporation
    Inventors: Joseph Porter Slaton, Parvez Daruwalla
  • Publication number: 20230396244
    Abstract: Methods and devices to reduce the switching time of radio frequency (RF) switches including antenna switches are disclosed. The disclosed teachings include selective bypassing of the capacitive and resistive elements of the circuit during the transition of RF switches from one state to another. Several implementations of the disclosed methods and devices are also presented.
    Type: Application
    Filed: June 3, 2022
    Publication date: December 7, 2023
    Inventors: Joseph Porter Slaton, Parvez Daruwalla
  • Publication number: 20230387863
    Abstract: Feedback methods and devices to reduce gain in RF amplifiers, more in particular LNAs, are disclosed. The described methods are based on providing feedback paths from the drain terminal of one of the LNA cascode transistors to the source terminal of the LNA input transistor, or from the gate terminal of the input transistor to the source terminal of the LNA input transistor. The disclosed methods can be combined with one another or with existing feedback methods to provide further flexibility and improved tradeoffs when designing LNAs for applications having different requirements.
    Type: Application
    Filed: May 27, 2022
    Publication date: November 30, 2023
    Inventors: Parvez DARUWALLA, Rong JIANG, Khushali SHAH
  • Patent number: 11831280
    Abstract: Methods and circuital arrangements for turning OFF branches of a multi-branch cascode amplifier are presented. First and second switching arrangements coupled to a branch allow turning OFF the branch while protecting transistors of the branch from a supply voltage that may be greater than a tolerable voltage of the transistors. The first switching arrangement includes a transistor-based switch that is in series connection with the transistors of the branch. The first switching arrangement drops the supply voltage during the OFF state of the branch and provides a conduction path for a current through the branch during the ON state of the branch. A resistor and a shunting switch are coupled to a gate of the transistor-based switch to reduce parasitic coupling effects of the transistor-based switch upon an RF signal coupled to the branch during the ON state and OFF state of the branch.
    Type: Grant
    Filed: February 13, 2023
    Date of Patent: November 28, 2023
    Assignee: PSEMI CORPORATION
    Inventors: Miles Sanner, Emre Ayranci, Parvez Daruwalla
  • Publication number: 20230253926
    Abstract: Methods and circuital arrangements for turning OFF branches of a multi-branch cascode amplifier are presented. First and second switching arrangements coupled to a branch allow turning OFF the branch while protecting transistors of the branch from a supply voltage that may be greater than a tolerable voltage of the transistors. The first switching arrangement includes a transistor-based switch that is in series connection with the transistors of the branch. The first switching arrangement drops the supply voltage during the OFF state of the branch and provides a conduction path for a current through the branch during the ON state of the branch. A resistor and a shunting switch are coupled to a gate of the transistor-based switch to reduce parasitic coupling effects of the transistor-based switch upon an RF signal coupled to the branch during the ON state and OFF state of the branch.
    Type: Application
    Filed: February 13, 2023
    Publication date: August 10, 2023
    Inventors: Miles SANNER, Emre AYRANCI, Parvez DARUWALLA
  • Publication number: 20230148375
    Abstract: Methods and devices to minimize or reduce phase discontinuity between different gain modes (including bypass, active and passive modes) with reduced increase in circuit size (footprint or number of components) and complexity, without impacting other performance parameters, are disclosed. Phase shifter elements that can be disposed in both the active and passive bypass paths are also described. Moreover, devices using the same reconfigurable phase shifter elements in both active and bypass modes are described. Components of the phase shifters can also perform output matching when the phase shifters are implemented as part of an RF receiver front-end.
    Type: Application
    Filed: October 24, 2022
    Publication date: May 11, 2023
    Inventors: Parvez DARUWALLA, Phanindra YERRAMILLI, Emre AYRANCI