Abstract: In one embodiment, an apparatus includes: a low noise amplifier (LNA) to receive and amplify a radio frequency (RF) signal, the LNA having a first controllable gain; a mixer to downconvert the RF signal to a second frequency signal; a programmable gain amplifier (PGA) coupled to the mixer to amplify the second frequency signal, the PGA having a second controllable gain; a digitizer to digitize the second frequency signal to a digitized signal; a demodulator coupled to the digitizer to demodulate the digitized signal; an automatic gain control (AGC) circuit to control one or more of the first controllable gain and the second controllable gain; and an AGC settling circuit to cause the demodulator to begin operation in response to determining that the AGC circuit has settled.

Abstract: In one embodiment, an apparatus includes: a low noise amplifier (LNA) to receive and amplify a radio frequency (RF) signal, the LNA having a first controllable gain; a mixer to downconvert the RF signal to a second frequency signal; a programmable gain amplifier (PGA) coupled to the mixer to amplify the second frequency signal, the PGA having a second controllable gain; a digitizer to digitize the second frequency signal to a digitized signal; a demodulator coupled to the digitizer to demodulate the digitized signal; an automatic gain control (AGC) circuit to control one or more of the first controllable gain and the second controllable gain; and an AGC settling circuit to cause the demodulator to begin operation in response to determining that the AGC circuit has settled.

Abstract: In an embodiment, an apparatus includes: a modulator to modulate a first signal; a distortion circuit coupled to the modulator to digitally pre-distort the first signal to compensate for a distortion of an amplifier; a distortion characterization circuit coupled to the distortion circuit to determine the distortion of the amplifier and configure the distortion circuit based on the determined distortion; a mixer coupled to the distortion circuit to upconvert the pre-distorted first signal to a pre-distorted radio frequency (RF) signal; and the amplifier coupled to the mixer to amplify the pre-distorted RF signal and output an amplified RF signal.

Abstract: In an embodiment, an apparatus includes: a modulator to modulate a first signal; a distortion circuit coupled to the modulator to digitally pre-distort the first signal to compensate for a distortion of an amplifier; a distortion characterization circuit coupled to the distortion circuit to determine the distortion of the amplifier and configure the distortion circuit based on the determined distortion; a mixer coupled to the distortion circuit to upconvert the pre-distorted first signal to a pre-distorted radio frequency (RF) signal; and the amplifier coupled to the mixer to amplify the pre-distorted RF signal and output an amplified RF signal.

Abstract: A communications receiver with improved blocker performance including multiple gain tables selected based on a number of reductions or back offs from a maximum coarse gain setting. A receiver chain with multiple gain stages converts a received signal to a digital format, determines the power level of the received signal, and provides an overload indication. A first gain table maximizes SNR and SNDR for weak blockers and at least one additional gain table successively improves SNDR for stronger blockers. An AGC circuit initially sets the coarse gain setting to maximum, and backs off a number of coarse gain steps until the receiver chain is not overloaded. The number of back off steps is used to select a gain table, the power level is used to select an entry in the selected table, and the selected entry includes gain settings for the gain stages of the receiver chain.

Abstract: In one form, a multi-chip module for a multi-mode receiver includes an MCM substrate and first and second demodulator die. The MCM substrate has first and second satellite input ports, first and second terrestrial/cable input ports, and first and second transport stream ports. The first demodulator die has a satellite port coupled to the first satellite input port of the MCM substrate, a terrestrial/cable port coupled to the first terrestrial/cable input port of the MCM substrate, and first and second transport stream ports coupled to the first and second transport stream ports of the MCM substrate. The second demodulator die has a satellite port coupled to the second satellite input port of the MCM substrate, a terrestrial/cable port coupled to the second terrestrial/cable input port of the MCM substrate, and first and second transport stream ports coupled to the first and second transport stream ports of the MCM substrate.

Abstract: In one form, a multi-chip module for a multi-mode receiver includes an MCM substrate and first and second demodulator die. The MCM substrate has first and second satellite input ports, first and second terrestrial/cable input ports, and first and second transport stream ports. The first demodulator die has a satellite port coupled to the first satellite input port of the MCM substrate, a terrestrial/cable port coupled to the first terrestrial/cable input port of the MCM substrate, and first and second transport stream ports coupled to the first and second transport stream ports of the MCM substrate. The second demodulator die has a satellite port coupled to the second satellite input port of the MCM substrate, a terrestrial/cable port coupled to the second terrestrial/cable input port of the MCM substrate, and first and second transport stream ports coupled to the first and second transport stream ports of the MCM substrate.

Abstract: In one form, a multi-chip module for a multi-mode receiver includes an MCM substrate and first and second demodulator die. The MCM substrate has first and second satellite input ports, first and second terrestrial/cable input ports, and first and second transport stream ports. The first demodulator die has a satellite port coupled to the first satellite input port of the MCM substrate, a terrestrial/cable port coupled to the first terrestrial/cable input port of the MCM substrate, and first and second transport stream ports coupled to the first and second transport stream ports of the MCM substrate. The second demodulator die has a satellite port coupled to the second satellite input port of the MCM substrate, a terrestrial/cable port coupled to the second terrestrial/cable input port of the MCM substrate, and first and second transport stream ports coupled to the first and second transport stream ports of the MCM substrate.

Abstract: In one form, a multi-chip module for a multi-mode receiver includes an MCM substrate and first and second demodulator die. The MCM substrate has first and second satellite input ports, first and second terrestrial/cable input ports, and first and second transport stream ports. The first demodulator die has a satellite port coupled to the first satellite input port of the MCM substrate, a terrestrial/cable port coupled to the first terrestrial/cable input port of the MCM substrate, and first and second transport stream ports coupled to the first and second transport stream ports of the MCM substrate. The second demodulator die has a satellite port coupled to the second satellite input port of the MCM substrate, a terrestrial/cable port coupled to the second terrestrial/cable input port of the MCM substrate, and first and second transport stream ports coupled to the first and second transport stream ports of the MCM substrate.

Abstract: An integrated circuit includes a tuner, a digital television (DTV) demodulator, an analog television (ATV) demodulator, and a controller. The tuner includes an input for receiving a radio frequency (RF) signal including at least one of an analog television signal and digital television signal, and including a first output terminal and a second output terminal. The DTV demodulator includes a DTV input coupled to the first output terminal of the tuner and includes a DTV output terminal. The ATV demodulator includes an ATV input coupled to the second output terminal of the tuner and includes an ATV output terminal. The controller is coupled to the tuner, the DTV demodulator, and the ATV demodulator to configure the tuner and at least one of the DTV demodulator and the ATV demodulator for receiving television content in a selected television format.

Abstract: In one embodiment, an interface may include various mechanisms to handle incoming clock and data signals. More specifically, the interface includes a first multiplexer to receive a first data signal via a serial peripheral interface (SPI) bus coupled to a first pin and a second multiplexer to receive a first clock signal via the SPI bus coupled to a second pin of the first IC and a second clock signal via an inter-integrated circuit (I2C) bus coupled to a third pin. In addition, the interface may include a decoder to receive the second clock signal and a second data signal via the I2C bus coupled to a fourth pin.

Abstract: In one embodiment, an interface may include various mechanisms to handle incoming clock and data signals. More specifically, the interface includes a first multiplexer to receive a first data signal via a serial peripheral interface (SPI) bus coupled to a first pin and a second multiplexer to receive a first clock signal via the SPI bus coupled to a second pin of the first IC and a second clock signal via an inter-integrated circuit (I2C) bus coupled to a third pin. In addition, the interface may include a decoder to receive the second clock signal and a second data signal via the I2C bus coupled to a fourth pin.

Abstract: A multi-standard single-chip receiver for digital demodulation of TV signals broadcasted over any of multiple digital television means, e.g., satellite, cable and terrestrial, is provided. The receiver can receive and demodulate a variety of different signal types received from one or more up-front tuners. A demodulator architecture in accordance with an embodiment of the present invention can be optimized to re-use common demodulation processing blocks for the different incoming signal types.

Abstract: An integrated circuit includes a tuner, a digital television (DTV) demodulator, an analog television (ATV) demodulator, and a controller. The tuner includes an input for receiving a radio frequency (RF) signal including at least one of an analog television signal and digital television signal, and including a first output terminal and a second output terminal. The DTV demodulator includes a DTV input coupled to the first output terminal of the tuner and includes a DTV output terminal. The ATV demodulator includes an ATV input coupled to the second output terminal of the tuner and includes an ATV output terminal. The controller is coupled to the tuner, the DTV demodulator, and the ATV demodulator to configure the tuner and at least one of the DTV demodulator and the ATV demodulator for receiving television content in a selected television format.

Abstract: A multi-standard single-chip receiver for digital demodulation of TV signals broadcasted over any of multiple digital television means, e.g., satellite, cable and terrestrial, is provided. The receiver can receive and demodulate a variety of different signal types received from one or more up-front tuners. A demodulator architecture in accordance with an embodiment of the present invention can be optimized to re-use common demodulation processing blocks for the different incoming signal types.

Abstract: In the slaving process, a reference signal is sampled by a clock signal of an oscillator and then digitized. The value representative of a phase error is then deduced from the sampled and digitized signal. A correction value is then deduced from this phase error to correct a digital value representing the oscillator control voltage. The device of the invention allows this process to be implemented. The invention also relates to a voltage-controlled crystal oscillator incorporating such a device.