Abstract: The signal transmission system comprises a transmitter circuit, a receiver circuit and a signal cable. A current divider is formed by a terminating resistor between the signal conductors of the signal cable. The transmitter circuit drives a loop current. When the receiver circuit input voltage has a voltage level above a first switching voltage threshold value, the output voltage assumes a first voltage level. The output voltage maintains the first voltage level when the input voltage is below the first switching voltage threshold value but above a second switching voltage threshold value. The transmitter circuit is configured to modulate the loop current with at least two different non-zero magnitudes at successive times. The first magnitude is greater than a first switching current threshold value and the second magnitude is less than the first switching current threshold value and greater than a second switching current threshold value.

Abstract: The present invention is directed in general to a LCD-panel, and particularly to a LCD panel whose gate drivers (GD) are assembled without a printed circuit board (PCB). This technique is so called PCB-less, where the wiring of the gate drivers (GD) is not done with conventional printed circuit boards (PCB), but directly on the LCD-glass. The invention is also applicable for chip on glass (COG) technique, where the gate drivers (GD) are directly connected to the glass wiring. To avoid the block-dim effects, while keeping the effort and cost low, it is proposed to add an additional line (VLclean) to each output stage (OUTx), whereby the additional line (VLclean) is used solely for supplying the reference potential of the storage capacitors (Cst) of the selected gate line (GLy). All other (unselected) gate lines are connected to the usual gate off supply line (VL).

Abstract: The present invention is directed in general to a LCD-panel, and particularly to a LCD panel whose gate drivers (GD) are assembled without a printed circuit board (PCB). This technique is so called PCB-less, where the wiring of the gate drivers (GD) is not done with conventional printed circuit boards (PCB), but directly on the LCD-glass. The invention is also applicable for chip on glass (COG) technique, where the gate drivers (GD) are directly connected to the glass wiring. To avoid the block-dim effects, while keeping the effort and cost low, it is proposed to add an additional line (VLclean) to each output stage (OUTx), whereby the additional line (VLclean) is used solely for supplying the reference potential of the storage capacitors (Cst) of the selected gate line (GLy). All other (unselected) gate lines are connected to the usual gate off supply line (VL).

Abstract: The invention relates to a switched-mode power supplying for a varying load in consecutive cycles of an operation period. Such a varying load may be, for example, a liquid crystal display device. The switched-mode power supply comprises converting means for converting an input voltage into an output voltage and control means arranged to generate a control signal for controlling the converting means. When chip-on-glass technology is used, parasitic resistances may introduce a lag in the output voltage regulation. In order to reduce the lag of the output voltage, the control means comprises memory means for storing status information corresponding to the load level relating to the switching pattern of the converting means in consecutive cycles, and the control means are arranged to generate the control signal from the retrieved status information.

Abstract: The invention relates to a switched-mode power supplying for a varying load in consecutive cycles of an operation period. Such a varying load may be, for example, a liquid crystal display device. The switched-mode power supply comprises converting means for converting an input voltage into an output voltage and control means arranged to generate a control signal for controlling the converting means. When chip-on-glass technology is used, parasitic resistances may introduce a lag in the output voltage regulation. In order to reduce the lag of the output voltage, the control means comprises memory means for storing status information corresponding to the load level relating to the switching pattern of the converting means in consecutive cycles, and the control means are arranged to generate the control signal from the retrieved status information.

Abstract: A voltage converter, for converting an input voltage (U.sub.i) to an output voltage (U.sub.0), includes a plurality of cascaded voltage multipliers (VM1-VMN) having clock inputs, a control circuit (CNTRLG) for supplying clock signals to the clock inputs, for controlling the voltage multipliers (VM1-VMN). The control circuit (CNTRLG) includes circuitry (SL) for activating selected ones from the plurality of the voltage multipliers (VM1-VMN). The clock signals can be programmed to a part of the voltage multiplier to a non-active state. The voltage converter can, in addition, be provided with monitoring circuitry (MN) coupled between the output of the voltage converter and an input of the circuitry (SL). The monitoring means (MN) measures the output voltage (U.sub.0) in order to take a decision about the required number N of active voltage multipliers (VM1-VMN).